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Webpack
Webpack is an open-source JavaScript module bundler. Webpack takes modules with dependencies and generates static assets representing those modules…
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Modularization and Webpack
Vasan Subramanian
Pro MERN Stack
2019
Corpus ID: 63417028
We started to get organized in the previous chapter by changing the architecture and adding checks for coding standards and best…
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2019
2019
UI library project setup for Vaimo group with modern web technology
Trinh Ky Nam
2019
Corpus ID: 196196196
Oulu University of Applied Sciences Degree Programme in Information Technology Author: Trinh Ky Nam Title of the bachelor’s…
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2019
2019
Semi-Automatic Asynchronous Logic Synthesis in XILINX: Design Flow and Case Study
I. Lemberski
,
Viktors I. Gopejenko
IFAC-PapersOnLine
2019
Corpus ID: 212801838
2014
2014
Hardware reduction for RAM-based Moore FSMs
M. Kolopienczyk
,
A. Barkalov
,
L. Titarenko
International Conference on Human System…
2014
Corpus ID: 21975643
A method is proposed allowing implementing logic circuit of Moore FSM with embedded memory block of FPGA chips. The method is…
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2011
2011
Advanced logic design through hands-on digital music synthesis
Walter James Condley
,
Andrew W. Hill
,
Matthew R. Guthaus
IEEE International Conference on Microelectronic…
2011
Corpus ID: 5682945
This paper presents a hands-on advanced logic design course using digital music synthesis as the basis of all homework and labs…
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2008
2008
FPGA based Packet Splitter Implementation Using Mixed Design Flow
S. A. Shinde
,
Vinod G. Shelake
,
R. Kamat
2008
Corpus ID: 55862550
Design and development of a FPGA based packet splitter using Handle–C DK4 design suite is reported. A mixed design flow…
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2008
2008
Web-oriented educational system for digital circuits modeling and simulation
M. Cupic
2008
Corpus ID: 17711107
To foster students learning on digital logics and digital circuits design, theory lessons should be closely intertwined with…
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2008
2008
Synthesis of control unit with code sharing and modified elementary chains
A. Barkalov
,
L. Titarenko
,
J. Bieganowski
International Conference on Mixed Design of…
2008
Corpus ID: 11898770
The method of optimization of the hardware amount in addressing circuit of compositional microprogram control unit is proposed…
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2007
2007
Efficient pass-pipelined VLSI architecture for context modeling of JPEG2000
K. Mathiang
,
O. Chitsobhuk
Asia-Pacific Conference on Communications
2007
Corpus ID: 20287157
In this paper, a design of pass-pipelined architecture for context modeling implemented on FPGA is proposed. The architecture is…
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2005
2005
MODELLING AND ANALYSIS OF AN ARITHMETIC-LOGIC UNIT WITH INTEGRATED DEVELOPMENT ENVIRONMENT WEBPACK
V. Kukenska
,
I. Simeonov
2005
Corpus ID: 57118277
One of the methods for designing digital devices is through the use of programmable logics. What is necessary for the separate…
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