Timing diagram (Unified Modeling Language)

Known as: Timing Diagram (UML), Timing diagram, UML Timing Diagram 
A timing diagram in the Unified Modeling Language 2.0 is a specific type of interaction diagram, where the focus is on timing constraints. Timing… (More)
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Topic mentions per year

Topic mentions per year

1973-2016
051019732016

Papers overview

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2010
2010
The modeling, simulation and verification of real-time systems can be unified and the efficiency of system development can be… (More)
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Highly Cited
2006
Highly Cited
2006
The industrial network, often referred to as fieldbus, becomes an indispensable component for intelligent manufacturing systems… (More)
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2004
2004
This paper deals with further development of the timing-diagram based specification language destined for application in modular… (More)
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2001
2001
In this work it is intended to compare different VHDL-based fault injection techniques: simulator commands, saboteurs and mutants… (More)
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2000
2000
Model checking is an automated approach to the formal ver-iication of hardware and software. To allow model checking tools to be… (More)
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1999
1999
Timing diagrams are popular in hardware design. They have been formalized for use in reasoning tasks, such as computer-aided… (More)
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1997
1997
State assignment problems still need satisfactory solutions to make asynchronous circuit synthesis more practical. A well-known… (More)
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Highly Cited
1984
Highly Cited
1984
A fast algorithm has been worked out for performing the Discrete Hartley Transform (DHT) of a data sequence of N elements in a… (More)
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1977
1977
ANALOG TO DIGITAL CONVERTERS perform digital logic, analog comparison and analog arithmetic. While digital logic and analog… (More)
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1976
1976
This paper deals with an anomalous behavior of input synchronizers which results in the occurrence of random errors in… (More)
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