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Tiled rendering

Known as: Tile based deferred rendering, Tile-based rendering, Tile renderer 
Tiled rendering is the process of subdividing (or tiling) a computer graphics image by a regular grid in image space to exploit local spatial… 
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Related topics

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32 relations
3D renderingATi Radeon R100 SeriesAdrenoCentral processing unit

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Prediction complexity-based HEVC parallel processing for asymmetric multicores
This paper proposes a novel Tile allocation method considering the computational ability of asymmetric multicores as well as the… 
2017
2017
On the Implication of NTC versus Dark Silicon on Emerging Scale-Out Workloads: The Multi-Core Architecture Perspective
The end of Dennard's scaling poses computer systems, especially the datacenters, in front of both power and utilization walls… 
2017
2017
An Autonomous Power and Clock Gating Technique in SRAM-Based FPGA
In this work, an autonomous power and clock gating technique for finite state machine (FSM) is being implemented in a… 
2016
2016
A Framework for Block Placement, Migration, and Fast Searching in Tiled-DNUCA Architecture
Multicore processors have proliferated several domains ranging from small-scale embedded systems to large data centers, making… 
2016
2016
Efficient VLSI architecture for SAO decoding in 4K Ultra-HD HEVC video codec
Sample Adaptive Offset (SAO) is a new tool added in latest video coding standard (HEVC) to achieve better coding efficiency… 
2015
2015
Tiled Frustum Culling for Differential Rendering on Mobile Devices
Mobile devices are part of our everyday life and allow augmented reality (AR) with their integrated camera image. Recent research… 
2012
2012
An investigation of stair mode in optical phased arrays using tiled apertures
With an optical phased array, the individual phases of a multi-fiber laser source can be manipulated by exploiting high-bandwidth… 
2010
2010
An energy model for graphics processing units
We present an energy model for a graphics processing unit (GPU) that is based on the amount and type of work performed in various… 
Highly Cited
2008
Highly Cited
2008
An OS-based alternative to full hardware coherence on tiled CMPs
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a… 
1991
1991
Grafted polymer tile.
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