Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 230,395,278 papers from all fields of science
Search
Sign In
Create Free Account
Test strategy
A test strategy is an outline that describes the testing approach of the software development cycle. It is created to inform project managers…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
12 relations
ISO/IEC 29119
Integration testing
Performance engineering
Risk-based testing
Expand
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2007
2007
Estimating Error Rate in Defective Logic Using Signature Analysis
Z. Pan
,
M. Breuer
IEEE transactions on computers
2007
Corpus ID: 8558987
As feature size approaches molecular dimensions and the number of devices per chip reaches astronomical values, VLSI…
Expand
2006
2006
Alternate electrical tests for extracting mechanical parameters of MEMS accelerometer sensors
Vishwanath Natarajan
,
S. Bhattacharya
,
A. Chatterjee
IEEE VLSI Test Symposium
2006
Corpus ID: 2601902
Recent advances in thin film micromachining techniques have spurred a new generation of smart systems incorporating…
Expand
2005
2005
A design and test technique for embedded software
Byeongdo Kang
,
Young-Jik Kwon
,
R. Lee
International Conference on Software Engineering…
2005
Corpus ID: 16997110
In recent years, embedded systems have become so complex and the development time to market is required to be shorter than before…
Expand
2005
2005
Reducing pattern delay variations for screening frequency dependent defects
Benjamin N. Lee
,
Li-C. Wang
,
M. Abadir
IEEE VLSI Test Symposium
2005
Corpus ID: 355618
The delay variations of a pattern set can come from two sources: (1) Different patterns sensitize different parts of the circuit…
Expand
2005
2005
Structural tests for jitter tolerance in SerDes receivers
S. Sunter
,
A. Roy
IEEE International Conference on Test, .
2005
Corpus ID: 565777
A suite of structural tests is described that uses on-chip under sampling to measure parameters that affect jitter tolerance in a…
Expand
2004
2004
Parallel test reduces cost of test more effectively than just a cheap tester
Jochen Rivoir
IEEE/CPMT/SEMI 29th International Electronics…
2004
Corpus ID: 42304736
Today's manufacturers of high-volume consumer devices are under tremendous cost pressure and consequently under extreme pressure…
Expand
1999
1999
DFT advances in the Motorola's MPC7400, a PowerPC/sup TM/ G4 microprocessor
C. Pyron
,
M. Alexander
,
+5 authors
Nandu Tendolkar
International Test Conference . Proceedings (IEEE…
1999
Corpus ID: 5077524
Several advances have been made in the design for testability of the MPC7400, the first fourth generation PowerPC microprocessor…
Expand
1995
1995
An object-oriented expert system for fault diagnosis in the ethylene distillation process
D. Batanov
,
Zhuang Cheng
1995
Corpus ID: 62392709
Highly Cited
1995
Highly Cited
1995
A built-in self-test strategy for wireless communication systems
B. R. Veillette
,
G. Roberts
International Test Conference
1995
Corpus ID: 41470303
Wireless communication is a rapidly expanding field and considerable research effort is underway. Electronic system manufacturers…
Expand
1988
1988
Parallel Architectures and Computer Vision
I. Page
1988
Corpus ID: 62267795
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE