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Temporal multithreading

Known as: Super-threading, Superthreading 
Temporal multithreading is one of the two main forms of multithreading that can be implemented on computer processor hardware, the other being… 
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Related topics

Related topics

17 relations
Barrel processorCDC 6600Central processing unitComputer hardware

Broader (2)

Computer architectureFlynn's taxonomy

Papers overview

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2016
2016
Effective concurrent infinite state systems Introduction to the scientific context
  • 2016
  • Corpus ID: 16240943
Multithreading is a central computing principle that allows a single process to launch multiple parallely-running threads… 
2015
2015
JAIP-MP: A four-core Java application processor
In this paper, we present the design of a four-core Java application processor, JAIP-MP. Each processor core in JAIP-MP is a… 
2011
2011
VFSMC - a core for cycle accurate multithreaded processing in hard real-time Systems-on-Chip
This paper focuses on the design, implementation and benchmarking of a core for cycle accurate multithreaded processing in hard… 
2008
2008
An efficient scheduling mechanism for simulating concurrent events in wireless communications based on an improved priority queue (PQ) TDM layered multi-threading approach
The physical activities of a real wireless network are represented by events which are the main components of a discrete event… 
2005
2005
Beyond Itanium 2 Intel's Montecito Is the First Itanium Processor to Feature Duplicate, Dual-thread Cores and Cache Hierarchies on a Single Die. It Features a Landmark 1.72 Billion Transistors and…
Intel’s Itanium 2 processor series has regularly delivered additional performance through the increased frequency and cache as… 
2002
2002
Introduction to Multithreading, Superthreading, and Hyperthreading
Back in the dual-Celeron days, when symmetric multiprocessing (SMP) first became cheap enough to come within reach of the average… 
1994
1994
Superthreading: a multithreaded approach to microprocessor design
Current superscalar processors attempt to achieve increased instruction level parallelism by increasing the number of functional… 
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