Skip to search formSkip to main contentSkip to account menu

Task parallelism

Known as: Control parallelism, Task level parallelism, TLP 
Task parallelism (also known as function parallelism and control parallelism) is a form of parallelization of computer code across multiple… 
Wikipedia (opens in a new tab)

Related topics

Related topics

34 relations
Algorithmic skeletonCentral processing unitChapelComputer cluster

Broader (1)

Parallel computing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2007
Highly Cited
2007
AA-Sort: A New Parallel Sorting Algorithm for Multi-Core SIMD Processors
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD… 
Highly Cited
2006
Highly Cited
2006
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor
In this paper, we show how 3D stacking technology can be used to implement a simple, low-power, high-performance chip… 
Highly Cited
2006
Highly Cited
2006
Dynamic power-performance adaptation of parallel computation on chip multiprocessors
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed… 
Highly Cited
2005
Highly Cited
2005
Chip multithreading: opportunities and challenges
Chip multi-threaded (CMT) processors provide support for many simultaneous hardware threads of execution in various ways… 
Highly Cited
2005
Highly Cited
2005
Parallelism and the ARM instruction set architecture
Over the past few years, the ARM reduced-instruction-set computing (RISC) processor has evolved to offer a family of chips that… 
Highly Cited
2004
Highly Cited
2004
Feasibility of Floating Platform Systems for Wind Turbines: Preprint
This paper provides a general technical description of several types of floating platforms for wind turbines. Platform topologies… 
Highly Cited
2004
Highly Cited
2004
Heave motion suppression of a spar with a heave plate
Highly Cited
1999
Highly Cited
1999
A Chip-Multiprocessor Architecture with Speculative Multithreading
Much emphasis is now being placed on chip-multiprocessor (CMP) architectures for exploiting thread-level parallelism in… 
Highly Cited
1996
Highly Cited
1996
The superthreaded architecture: thread pipelining with run-time data dependence checking and control speculation
This peeper presents a new concurrent multiple-threaded architectural model, called superthreading, for exploiting thread-level… 
Highly Cited
1993
Highly Cited
1993
Exploiting task and data parallelism on a multicomputer
For many applications, achieving good performance on a private memory parallel computer requires exploiting data parallelism as… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)