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Static random-access memory

Known as: RSNM, S-RAM, SRAM latency 
Static random-access memory (static RAM or SRAM) is a type of semiconductor memory that uses bistable latching circuitry (flip-flop) to store each… Expand
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2018
Highly Cited
2018
X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories
Silicon-based static random access memories (SRAM) and digital Boolean logic have been the workhorse of the state-of-the-art… Expand
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2017
2017
Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory
This paper presents a low leakage, half-select free SB9T SRAM cell with good static and dynamic read/write performance along with… Expand
Highly Cited
2016
Highly Cited
2016
Deep Compression: Compressing Deep Neural Network with Pruning, Trained Quantization and Huffman Coding
Neural networks are both computationally intensive and memory intensive, making them difficult to deploy on embedded systems with… Expand
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Highly Cited
2016
Highly Cited
2016
EIE: Efficient Inference Engine on Compressed Deep Neural Network
State-of-the-art deep neural networks (DNNs) have hundreds of millions of connections and are both computationally and memory… Expand
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Highly Cited
2013
Highly Cited
2013
Electron-Induced Single-Event Upsets in Static Random Access Memory
We present experimental evidence of single-event upsets in 28 and 45 nm CMOS SRAMs produced by single energetic electrons. Upsets… Expand
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Highly Cited
2011
Highly Cited
2011
A 4 V Operation, Flexible Braille Display Using Organic Transistors, Carbon Nanotube Actuators, and Organic Static Random‐Access Memory
A sheet-type Braille display operating at 4 V has been successfully fabricated by integrating organic an static random-access… Expand
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Highly Cited
2003
Highly Cited
2003
Magnetically engineered spintronic sensors and memory
The discovery of enhanced magnetoresistance and oscillatory interlayer exchange coupling in transition metal multilayers just… Expand
Highly Cited
2002
Highly Cited
2002
Modeling the effect of technology trends on the soft error rate of combinational logic
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and… Expand
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Highly Cited
1988
Highly Cited
1988
Fault modeling and test algorithm development for static random access memories
A fault model for SRAMs (static random-access memories) is presented based on physical spot defects, which are modeled as local… Expand
Highly Cited
1987
Highly Cited
1987
Static-noise margin analysis of MOS SRAM cells
The stability of both resistor-load (R-load) and full-CMOS SRAM cells is investigated analytically as well as by simulation… Expand
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