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Scoreboarding

Known as: Score 
Scoreboarding is a centralized method, used in the CDC 6600 computer, for dynamically scheduling a pipeline so that the instructions can execute out… Expand
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Increasing incomes and awards of games leads to better manage games for referees to prevent decision errors. Besides investments… Expand
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2016
2016
Execution of GPGPU workloads consists of different stages including data I/O on the CPU, memory copy between the CPU and GPU, and… Expand
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2015
2015
Multi-processor system on chip (MPSoC) has been widely applied in embedded systems in the past decades. However, it has posed… Expand
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2005
2005
This paper presents a sequence of three projects on design and formal verification of pipelined and superscalar processors: 1) a… Expand
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2004
2004
In this paper, we describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is… Expand
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2003
2003
We present the formal verification of an Intel Xscale processor model. The Xscale is a superpipelined RISC processor with 7-stage… Expand
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2001
2001
Statically scheduled machines do have a disadvantage when dealing with dynamic events, such as cache hit or miss detection. Early… Expand
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1995
1995
Micronets model processor architectures as a network of communicating resources, in contrast to the traditional one of a linear… Expand
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1993
1993
Instruction-level parallelism in a single stream of code for non-numerical applications has been the subject of many recent… Expand
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1988
1988
MICROPROCESSOR OPERATING FREQUENCIES are improving more rapidly than cost-effective memory subsystems. As this operating… Expand
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