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Safe semantics
Known as:
Safe register
Safe semantics is a consistency model that describes one type of guarantee a data register provides when it is shared by several processors in a…
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Related topics
Related topics
8 relations
Atomic semantics
Central processing unit
Consistency model
Parallel computing
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Broader (1)
Concurrency control
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Safe registers can achieve correct implementation of peterson’s two process mutual exclusion algorithm
Amartya Banerjee
,
A. Bandyopadhyay
CSI Transactions on ICT
2017
Corpus ID: 256331451
Most of the mutual exclusion algorithms in a shared memory system assume that memory reference to at least one shared variable…
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2015
2015
Under the Hood of the Bakery Algorithm: Mutual Exclusion as a Matter of Priority
Yoram Moses
,
Katia Patkin
Colloquium on Structural Information…
2015
Corpus ID: 32267637
A new approach to the study and analysis of Mutual Exclusion ME algorithms is presented, based on identifying the priority…
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2013
2013
Safe, Regular, and Atomic Read/Write Registers
M. Raynal
2013
Corpus ID: 58754598
For self-containment, this chapter starts with a short presentation of the notions of safe, regular, and atomic read/write…
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2011
2011
An Algorithm for Implementing BFT Registers in Distributed Systems with Bounded Churn
R. Baldoni
,
Silvia Bonomi
,
A. S. Nezhad
Safety-critical Systems Symposium
2011
Corpus ID: 1021906
Distributed storage service is one of the main abstractions provided to the developers of distributed applications due to its…
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2011
2011
Safe Register Token Transfer in a Ring
T. Herman
arXiv.org
2011
Corpus ID: 18744833
A token ring is an arrangement of N processors that take turns engaging in an activity which must be controlled. A token confers…
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2010
2010
Bounds on the Costs of Register Implementations TR 90025 June , 1990 Soma Cbaudlmri
J. Welch
2010
Corpus ID: 36687383
A fundamental aspect of any concurrent system is how processes communicate with each other. Ultimately, all communication…
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2007
2007
Using Sticky Bits for Wait-Free Synchronization1
Serge A. Plotkin
2007
Corpus ID: 18013457
In this paper we consider implementation of atomic wait-free objects in the context of a shared-memory multiprocessor. We…
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2006
2006
Metastability in asynchronous wait-free protocols
S. Paynter
,
Neil Henderson
,
J. Armstrong
IEEE transactions on computers
2006
Corpus ID: 23054731
We demonstrate that the safe register abstraction is an inappropriate model of a shared bit variable in an ACM. This is due to…
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1995
1995
Lazy-writer multivalued registers
Martha J. Kosa
ACM SIGACT-SIGOPS Symposium on Principles of…
1995
Corpus ID: 6838223
We study wait-free constructions of multivalued regist ers from bits. Although atomic wait-free registers cannot solely be used…
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1991
1991
Bounds on the Costs of Register Implementations
S. Chaudhuri
,
J. Welch
International Workshop on Distributed Algorithms
1991
Corpus ID: 39647104
A fundamental aspect of any concurrent system is how processes communicate with each other. Ultimately, all communication…
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