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SIMD
Known as:
Single Instruction Multiple Data
, Single instruction, multiple data
, SIMD lane
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Single instruction, multiple data (SIMD), is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing…
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50 relations
APE100
ARM Cortex-A7
ARM Cortex-A9
AVR32
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Application-Scale Secure Multiparty Computation
J. Launchbury
,
David W. Archer
,
Thomas Dubuisson
,
Eric Mertens
European Symposium on Programming
2014
Corpus ID: 19014937
Secure multiparty computation MPC permits a collection of parties to compute a collaborative result without any of the parties or…
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2012
2012
Big Data Challenges: A Program Optimization Perspective
A. Kejariwal
Second International Conference on Cloud and…
2012
Corpus ID: 17211145
Big Data is characterized by the increasing volume (of the order of zeta bytes) and velocity of data generation. It is projected…
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2012
2012
Analysis and Optimization of Financial Analytics Benchmark on Modern Multi- and Many-core IA-Based Architectures
M. Smelyanskiy
,
J. Sewall
,
+10 authors
Ekaterina Gonina
SC Companion: High Performance Computing…
2012
Corpus ID: 14213320
In the past 20 years, computerization has driven explosive growth in the volume of financial markets and in the variety of traded…
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2010
2010
Comprehensive Comparison of Hardware Performance of Fourteen Round 2 SHA-3 Candidates with 512-bit Outputs Using Field Programmable Gate Arrays
K. Gaj
,
Ekawat Homsirikamol
2010
Corpus ID: 15595525
In this paper, we extend our evaluation of the hardware performance of 14 Round 2 SHA-3 candidates, accepted for the presentation…
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2007
2007
The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture
H. Noda
,
M. Nakajima
,
+12 authors
Toru Shimizu
IEEE Journal of Solid-State Circuits
2007
Corpus ID: 43656055
This paper describes the design and implementation of the massively parallel processor based on the matrix architecture which is…
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2007
2007
Diffusion Maps and Geometric Harmonics for Automatic Target Recognition (ATR). Volume 2. Appendices
S. Zucker
,
R. Coifman
2007
Corpus ID: 33721827
Abstract : Geometric harmonics provides a framework for taking data in high-dimensional measurement spaces and embedding them in…
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2004
2004
A scalable and programmable simplicial CNN digital pixel processor architecture
P. Mandolesi
,
P. Julián
,
A. Andreou
IEEE Transactions on Circuits and Systems Part 1…
2004
Corpus ID: 12260491
We propose a programmable architecture for a single instruction multiple data image processor that has its foundation on the…
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Review
2003
Review
2003
MPEG Decoding Workload Characterization
Matthew J. Holliman
,
E. Li
,
Yen-kuang Chen
2003
Corpus ID: 17026616
decoding has been extensively studied in the past, it continues to gain importance as a key workload underlying many present and…
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2000
2000
Architecture and compiler design issues in programmable media processors
W. Wolf
,
Jason E. Fritts
2000
Corpus ID: 8165082
The processing demands for multimedia applications are rapidly escalating. Many current applications are pushing the limits of…
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1994
1994
Unifying FPGAs and SIMD Arrays
Michael Bolotski
,
A. Dehon
,
Jr Thomas F. Knight
,
Jonathan Rose
1994
Corpus ID: 15068674
Field-Programmable Gate Arrays (FPGAs) and Single-Instruction Multiple-Data (SIMD) processing arrays share many architectural…
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