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SIMD
Known as:
Single Instruction Multiple Data
, Single instruction, multiple data
, SIMD lane
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Single instruction, multiple data (SIMD), is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing…
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50 relations
APE100
ARM Cortex-A7
ARM Cortex-A9
AVR32
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Performance Evaluation of NAS Parallel Benchmarks on Intel Xeon Phi
Arunmoezhi Ramachandran
,
Jérôme Vienne
,
R. V. D. Wijngaart
,
L. Koesterke
,
I. Sharapov
International Conference on Parallel Processing
2013
Corpus ID: 10095454
NAS parallel benchmarks (NPB) are a set of applications commonly used to evaluate parallel systems. We use the NPB-OpenMP version…
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Highly Cited
2010
Highly Cited
2010
Optimizing and tuning the fast multipole method for state-of-the-art multicore architectures
Aparna Chandramowlishwaran
,
Samuel Williams
,
L. Oliker
,
I. Lashuk
,
G. Biros
,
R. Vuduc
IEEE International Parallel and Distributed…
2010
Corpus ID: 6957303
This work presents the first extensive study of single-node performance optimization, tuning, and analysis of the fast multipole…
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2008
2008
A real-time motion estimation FPGA architecture
Konstantinos Babionitakis
,
G. Doumenis
,
+5 authors
N. Vlassopoulos
Journal of Real-Time Image Processing
2008
Corpus ID: 34912193
A motion estimation architecture allowing the execution of a variety of block-matching search techniques is presented in this…
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Highly Cited
2007
Highly Cited
2007
On Implementing Graph Cuts on CUDA
Mohamed E. Hussein
,
A. Varshney
,
Larry Davis
2007
Corpus ID: 9357297
The Compute Unified Device Architecture (CUDA) has enabled graphics processors to be explicitly programmed as general-purpose…
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2005
2005
Software Defined Radio - A High Performance Embedded Challenge
Hyunseok Lee
,
Yuan Lin
,
+4 authors
K. Flautner
International Conference on High Performance…
2005
Corpus ID: 13768633
Wireless communication is one of the most computationally demanding workloads. It is performed by mobile terminals (“cell phones…
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Review
2002
Review
2002
Overview of research efforts on media ISA extensions and their usage in video coding
V. Lappalainen
,
T. Hämäläinen
,
P. Liuha
IEEE Trans. Circuits Syst. Video Technol.
2002
Corpus ID: 19719803
This paper summarizes the results of over 25 research groups or individual researchers that have presented video coding…
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Highly Cited
1995
Highly Cited
1995
A massively parallel approach to real-time vision-based road markings detection
Alberto Broggi
Proceedings of the Intelligent Vehicles '95…
1995
Corpus ID: 379505
This paper presents the vision-based road detection system currently operative onto the MOB-LAB land vehicle. Based on a full…
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Highly Cited
1995
Highly Cited
1995
The REFINE Multiprocessor - Theoretical Properties and Algorithms
Suchendra Bhandarkar
,
H. Arabnia
Parallel Computing
1995
Corpus ID: 9430250
1987
1987
The APE computer: An array processor optimized for lattice gauge theory simulations
M. Albanese
,
P. Bacilieri
,
+23 authors
R. Tripiccione
1987
Corpus ID: 62554426
Highly Cited
1987
Highly Cited
1987
Supporting Divide-and-Conquer Algorithms for Image Processing
Q. Stout
J. Parallel Distributed Comput.
1987
Corpus ID: 3073446
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