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Routing (electronic design automation)
Known as:
Routing (EDA)
, Routing (disambiguation)
, Wire routing
In electronic design, wire routing, commonly called simply routing, is a step in the design of printed circuit boards (PCBs) and integrated circuits…
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Related topics
Related topics
19 relations
Antenna effect
Boolean satisfiability problem
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Channel router
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2010
2010
Automated Passive-Transmission-Line Routing Tool for Single-Flux-Quantum Circuits Based on A* Algorithm
Masamitsu Tanaka
,
K. Obata
,
+6 authors
A. Fujimaki
IEICE transactions on electronics
2010
Corpus ID: 921222
We demonstrated an automated passive-transmission-line routing tool for single-flux-quantum (SFQ) circuits. The tool is based on…
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2002
2002
Buffered routing tree construction under buffer placement blockages
Wei Chen
,
Massoud Pedram
,
Premal Buch
Proceedings of ASP-DAC/VLSI Design . 7th Asia and…
2002
Corpus ID: 413321
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are…
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1994
1994
Mesh Routing Topologies For FPGA Arrays
S. Hauck
,
G. Borriello
,
C. Ebeling
1994
Corpus ID: 17072433
There is currently great interest in using fixed arrays of FPGAs for logic emulators, custom computing devices, and software…
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1993
1993
Advanced Search Techniques for Circuit Partitioning
S. Areibi
,
A. Vannelli
Quadratic Assignment and Related Problems
1993
Corpus ID: 5923476
Most real world problems especially circuit layout and VLSI design are too complex for any single processing technique to solve…
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1992
1992
Knowledge Representation and Reasoning in a Software Synthesis Architecture
D. Setliff
,
Rob A. Rutenbar
IEEE Trans. Software Eng.
1992
Corpus ID: 28282067
The knowledge representation and reasoning strategies in an automatic program synthesis architecture called ELF are described…
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1991
1991
Bit-level pipelined 2-D digital filters for real-time image processing
Cheng-Wen Wu
IEEE Trans. Circuits Syst. Video Technol.
1991
Corpus ID: 11268295
Bit-level systolic arrays for real-time 2-D FIR and IIR (finite and infinite impulse response) filters are presented. Two…
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1985
1985
A large scale cellular array processor: AAP-1
T. Kondo
,
T. Nakashima
,
T. Tsuchiya
,
Y. Sugiyama
,
T. Sudo
International Conference on Scientific Computing
1985
Corpus ID: 9450955
A SIMD cellular array processor called the Adaptive Array Processor (AAP-1) has been developed. Its 256 x 256 array of bit…
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1984
1984
The complexity of single row routing
Raghunath Raghavan
,
S. Sahni
1984
Corpus ID: 58780212
This paper investigates a systematic suboptimal approach to multilayer rectilinear wire routing: the single row approach. The…
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1983
1983
WIRE ROUTING EXPERIMENTS ON A RASTER PIPELINE SUBARRAY MACHINE.
Rob A. Rutenbar
,
T. Mudge
,
D. Atkins
1983
Corpus ID: 114028625
1974
1974
An iterative technique for printed wire routing
F. Rubin
Design Automation Conference
1974
Corpus ID: 15766177
Wires are routed allowing crossings in the initial layout. By spreading the wires and increasing the crossover penalties, fewer…
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