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Known as:
Window (disambiguation)
In computer engineering, register windows are a feature in some instruction set architectures to improve the performance of procedure calls, a very…
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22 relations
AMD Am29000
Berkeley RISC
Calling convention
Central processing unit
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2008
2008
Yield maximization for system-level task assignment and configuration selection of configurable multiprocessors
L. Singhal
,
Sejong Oh
,
E. Bozorgzadeh
CODES+ISSS '08
2008
Corpus ID: 16379740
Configurable multiprocessor system is a promising design alternative because of its high degree of flexibility, short development…
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2003
2003
Early Control of Register Pressure for Software Pipelined Loops
S. Touati
,
C. Eisenbeis
CC
2003
Corpus ID: 9284820
The register allocation in loops is generally performed after or during the software pipelining process. This is because doing a…
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2000
2000
Power and Control in Networked Sensors
E. J. Riedy
,
R. Szewczyk
2000
Corpus ID: 14790392
The fundamental constraint on a networked sensor is its energy consumption, since it may be either impossible or not feasible to…
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Highly Cited
1994
Highly Cited
1994
Quantifying Behavioral Differences Between C and C++ Programs
B. Calder
,
D. Grunwald
,
B. Zorn
1994
Corpus ID: 1883869
Improving the performance of C programs has been a topic of great interest for many years. Both hardware technology and compiler…
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1993
1993
Multiple threads in cyclic register windows
Yasuo Hidaka
,
H. Koike
,
Hidehiko Tanaka
ISCA '93
1993
Corpus ID: 18643625
Multi-threading is often used to compile logic and functional languages, and implement parallel C libraries. Fine-grain multi…
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Highly Cited
1992
Highly Cited
1992
Register allocation for software pipelined loops
B. R. Rau
,
Meng Lee
,
P. Tirumalai
,
M. Schlansker
PLDI '92
1992
Corpus ID: 16932355
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops…
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1990
1990
Architectural support for register allocation in the presence of aliasing
Ben Heggy
,
M. Soffa
Proceedings SUPERCOMPUTING '90
1990
Corpus ID: 13164068
A hardware support mechanism is presented that permits all classes of data objects, including dynamically allocated objects and…
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1990
1990
Evaluation of the optimal strategy for managing the register file
Olatz Arregi
,
C. Rodríguez
,
Amaia Ibarra
1990
Corpus ID: 62571804
1988
1988
A RISC architecture with two-size, overlapping register windows
B. Furht
IEEE Micro
1988
Corpus ID: 11174898
The issues involved in designing multiple-register window schemes are examined, and fixed-size, variable-size and two-size window…
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1987
1987
A performance analysis of automatically managed top of stack buffers
Timothy J. Stanley
,
R. G. Wedig
ISCA '87
1987
Corpus ID: 18844511
In this paper, the feasibility of using register banks as a top of stack (TOS) buffer is demonstrated. A quantitative performance…
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