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RLC circuit
Known as:
RLC circuits
, RCL circuit
, LCR circuit
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An RLC circuit is an electrical circuit consisting of a resistor (R), an inductor (L), and a capacitor (C), connected in series or in parallel. The…
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Related topics
Related topics
32 relations
Analog signal processing
Analogue filter
Bandwidth (signal processing)
Crystal oscillator
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Broader (1)
Electronic filter topology
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2007
Highly Cited
2007
An Empirical Study on 3G Network Capacity and Performance
Wee Lum Tan
,
F. Lam
,
W. Lau
IEEE INFOCOM - 26th IEEE International…
2007
Corpus ID: 16627223
This paper presents the findings of an extensive measurement study on multiple commercial 3G UMTS networks. We have investigated…
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2007
2007
Waveform analysis and delay prediction for a CMOS gate driving RLC interconnect load
Brajesh Kumar Kaushik
,
S. Sarkar
,
R. P. Agarwal
Integr.
2007
Corpus ID: 8461355
Highly Cited
2005
Highly Cited
2005
Performance evaluation of MPEG-4 video streaming over UMTS networks using an integrated tool environment
A. Lo
,
G. Heijenk
,
I. Niemegeers
2005
Corpus ID: 15580153
Universal Mobile Telecommunications System (UMTS) is a third-generation mobile communications system that supports wireless…
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Highly Cited
2004
Highly Cited
2004
A CMOS impulse generator for UWB wireless communication systems
Youngkyun Jeong
,
Sungyong Jung
,
Jin Liu
IEEE International Symposium on Circuits and…
2004
Corpus ID: 3573003
A fully integrated CMOS impulse generator was designed as a part of the System-on-Chip (SOC) implementation of an Ultra-Wide…
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Highly Cited
2003
Highly Cited
2003
User satisfaction models and scheduling algorithms for packet-switched services in UMTS
N. Enderle
,
X. Lagrange
The 57th IEEE Semiannual Vehicular Technology…
2003
Corpus ID: 195700550
In this paper, we propose a user satisfaction model for packet-switched services in next generation wireless networks for…
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1996
1996
Efficient gate delay modeling for large interconnect loads
A. Kahng
,
S. Muddu
Proceedings IEEE Multi-Chip Module Conference…
1996
Corpus ID: 2613896
With fast switching speeds and large interconnect trees (MCMs), the resistance and inductance of interconnect has a dominant…
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1994
1994
A simplified synthesis of transmission lines with a tree structure
Dian Zhou
,
S. Su
,
F. Tsui
,
D. Gao
,
J. Cong
1994
Corpus ID: 11569655
The limiting factor for high-performance systems is being set by interconnection delay rather than transistor switching speed…
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Highly Cited
1993
Highly Cited
1993
High frequency compensated current-mode ladder filters using multiple output OTAs
J. Ramírez-Angulo
,
E. Sánchez-Sinencio
IEEE International Symposium on Circuits and…
1993
Corpus ID: 7913048
A methodology to synthesize continuous-time current-mode filters using multiple output operational transconductance amplifiers…
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1968
1968
IF Amplifier using C/SUB c/ compensated transistors
J. Mataya
,
G. Haines
,
S. Marshall
1968
Corpus ID: 62222617
An integrated bridge network of four transistors is used as a self-neutralized active element in tuned RLC amplifier designs. The…
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Highly Cited
1959
Highly Cited
1959
Applications of matrix algebra to network theory
I. Cederbaum
IRE Transactions on Information Theory
1959
Corpus ID: 9016113
In this paper some properties of unimodular (or E -) and paramount (or M -) matrices are discussed. The paper deals with matrices…
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