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PARSEC Benchmark Suite

The Princeton Application Repository for Shared-Memory Computers (PARSEC) is a benchmark suite composed of multithreaded emerging workloads that is… 
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Benchmark (computing)Multi-core processorOpenSolaris

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Jumbler: A lock-contention aware thread scheduler for multi-core parallel machines
On a cache-coherent multi-core multi-processor parallel machine, the execution time of a multi-threaded application with high… 
2014
2014
Performance scalability and dynamic behavior of Parsec benchmarks on many-core processors
The Parsec benchmark suite is widely used in evaluation of parallel architectures, both existing and novel, the latter through… 
2013
2013
Distributed fair DRAM scheduling in network-on-chips architecture
2012
2012
Predicting the Cost of Lock Contention in Parallel Applications on Multicores using Analytic Modeling
Predicting the Cost of Lock Contention in Parallel Applications on Multicores using Analytic Modeling 
2012
2012
Exploiting Linux Control Groups for Effective Run-time Resource Management
The extremely high technology process reached by the silicon manufacturing (under the 32nm) has led to production of… 
2012
2012
Self-Correction Trace Model: A Full-System Simulator for Optical Network-on-Chip
The improvement of the emerging technology involves the nanophotonic into the on-chip interconnection, which provides a large… 
2011
2011
Self-related traces: An alternative to full-system simulation for NoCs
The network-on-chip (NoC) has become an integral part of multicore systems and multiprocessor systems-on-chip (MPSoCs). Detailed… 
2011
2011
Accelerating a PARSEC Benchmark Using Portable Subword SIMD
—We present a case study of the GNU Compiler Collection (GCC) Vector Extensions in GCC 4.7. In particular, we examine the… 
2011
2011
ALPS: A Methodology for Application-Level Communication Characterization of Parsec 2.1
2009
2009
Performance analysis of non-uniform cache architecture policies for chip-multiprocessors using the Parsec v2.0 Benchmark Suite
Non-Uniform Cache Architectures (NUCA)have been proposed as a solution to overcome wire delays that will dominate on-chip… 
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