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OpenRISC

Known as: Or1k 
OpenRISC is a project to develop a series of open source instruction set architectures based on established reduced instruction set computing (RISC… 
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Related topics

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37 relations
ARM architectureApplication-specific integrated circuitC++Comparison of instruction set architectures

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2020
2020
In-field Functional Test of CAN Bus Controllers
The Controller Area Network (CAN) bus is a serial bus protocol widely used in the automotive domain to allow communication… 
2018
2018
Activation-Aware Slack Assignment for Time-to-Failure Extension and Power Saving
This paper proposes a mean time-to-failure (MTTF) aware design methodology for minimizing power dissipation while satisfying… 
2016
2016
A Fully Encrypted Microprocessor The Secret Computer is Nearly Here
2016
2016
SmashClean: A hardware level mitigation to stack smashing attacks in OpenRISC
Buffer overflow and stack smashing have been one of the most popular software based vulnerabilities in literature. There have… 
2016
2016
Implementation of an OpenRISC based SoC and Linux Kernel installation on FPGA
Embedded system designs and applications have been more common today. The aim of this study is to tell how to implement open… 
2015
2015
Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation
Specialization and accelerators are being proposed as an effective way to address the slowdown of Dennard scaling. DySER is one… 
2012
2012
FlexCOS: An Open Smartcard Platform for Research and Education
The smartcard industry treats their know-how and products as confidential. Consequently it is difficult to do research on… 
2010
2010
Active Fault-Tolerance Low Power Multiplier with OpenRISC Platform
Today's embedded systems are commonly required to be light, small, and power-efficient. However, applications for embedded… 
2008
2008
Design and implementation of a debugging system for OpenRISC processor
A gdb-based debugging system for OpenRISC1200 Processor based on IEEE1149.1 JTAG interface is developed. Unlike usual gdb-based… 
2007
2007
Formal Verification of a Pipelined Cryptographic Circuit Using Equivalence Checking and Completion Functions
In formal hardware verification, equivalence checking is often used but is unable to verify a pipelined circuit against a non… 
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