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OpenRISC
Known as:
Or1k
OpenRISC is a project to develop a series of open source instruction set architectures based on established reduced instruction set computing (RISC…
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Related topics
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ARM architecture
Application-specific integrated circuit
C++
Comparison of instruction set architectures
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2020
2020
In-field Functional Test of CAN Bus Controllers
R. Cantoro
,
Sandro Sartoni
,
M. Reorda
IEEE VLSI Test Symposium
2020
Corpus ID: 216024174
The Controller Area Network (CAN) bus is a serial bus protocol widely used in the automotive domain to allow communication…
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2018
2018
Activation-Aware Slack Assignment for Time-to-Failure Extension and Power Saving
Yutaka Masuda
,
T. Onoye
,
M. Hashimoto
IEEE Transactions on Very Large Scale Integration…
2018
Corpus ID: 53082020
This paper proposes a mean time-to-failure (MTTF) aware design methodology for minimizing power dissipation while satisfying…
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2016
2016
A Fully Encrypted Microprocessor The Secret Computer is Nearly Here
Peter T. Breuer
,
Jonathan P. Bowen
ANT/SEIT
2016
Corpus ID: 260376
2016
2016
SmashClean: A hardware level mitigation to stack smashing attacks in OpenRISC
Manaar Alam
,
Debapriya Basu Roy
,
Sarani Bhattacharya
,
Vidya Govindan
,
R. Chakraborty
,
Debdeep Mukhopadhyay
International Conference on Formal Methods and…
2016
Corpus ID: 25788502
Buffer overflow and stack smashing have been one of the most popular software based vulnerabilities in literature. There have…
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2016
2016
Implementation of an OpenRISC based SoC and Linux Kernel installation on FPGA
Latif Akçay
,
Mehmet Tükel
,
S. Yalcin
Signal Processing and Communications Applications…
2016
Corpus ID: 15431250
Embedded system designs and applications have been more common today. The aim of this study is to tell how to implement open…
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2015
2015
Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation
C. Ho
,
Venkatraman Govindaraju
,
+6 authors
Karthikeyan Sankaralingam
IEEE International Symposium on Performance…
2015
Corpus ID: 18084139
Specialization and accelerators are being proposed as an effective way to address the slowdown of Dennard scaling. DySER is one…
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2012
2012
FlexCOS: An Open Smartcard Platform for Research and Education
Kristian Beilke
,
Volker Roth
International Conference on Network and System…
2012
Corpus ID: 30128916
The smartcard industry treats their know-how and products as confidential. Consequently it is difficult to do research on…
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2010
2010
Active Fault-Tolerance Low Power Multiplier with OpenRISC Platform
Han-Sam Jung
,
Joo-Yul Park
,
Ki-Seok Chung
2010
Corpus ID: 60922311
Today's embedded systems are commonly required to be light, small, and power-efficient. However, applications for embedded…
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2008
2008
Design and implementation of a debugging system for OpenRISC processor
Li Lian
,
Xiaochao Li
,
Fen Xiao
,
Donghui Guo
International Conference on Anti-counterfeiting…
2008
Corpus ID: 16750545
A gdb-based debugging system for OpenRISC1200 Processor based on IEEE1149.1 JTAG interface is developed. Unlike usual gdb-based…
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2007
2007
Formal Verification of a Pipelined Cryptographic Circuit Using Equivalence Checking and Completion Functions
C. H. Lam
,
M. Aagaard
Canadian Conference on Electrical and Computer…
2007
Corpus ID: 16284275
In formal hardware verification, equivalence checking is often used but is unable to verify a pipelined circuit against a non…
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