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OpenRISC

Known as: Or1k 
OpenRISC is a project to develop a series of open source instruction set architectures based on established reduced instruction set computing (RISC… 
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Related topics

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37 relations
ARM architectureApplication-specific integrated circuitC++Comparison of instruction set architectures

Papers overview

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Review
2019
Review
2019
Open-Source RISC-V Processor IP Cores for FPGAs — Overview and Evaluation
Advances in semiconductor miniaturization are an important driver for Field Programmable Gate Arrays (FPGAs) since their… 
2018
2018
The Secret Processor Will Go to the Ball: Benchmark Insider-Proof Encrypted Computing
‘Encrypted computing’ is an approach to preventing insider attacks by the privileged operator against the unprivileged user on a… 
2016
2016
A Fully Encrypted Microprocessor The Secret Computer is Nearly Here
2016
2016
SmashClean: A hardware level mitigation to stack smashing attacks in OpenRISC
Buffer overflow and stack smashing have been one of the most popular software based vulnerabilities in literature. There have… 
Highly Cited
2015
Highly Cited
2015
PULP: A parallel ultra low power platform for next generation IoT applications
2015
2015
Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation
Specialization and accelerators are being proposed as an effective way to address the slowdown of Dennard scaling. DySER is one… 
2011
2011
Constant-bandwidth supply for priority processing
Today's consumer electronic devices feature multiple applications which have to share scarcely available resources. We consider a… 
2010
2010
Active Fault-Tolerance Low Power Multiplier with OpenRISC Platform
Today's embedded systems are commonly required to be light, small, and power-efficient. However, applications for embedded… 
2008
2008
Design and implementation of a debugging system for OpenRISC processor
A gdb-based debugging system for OpenRISC1200 Processor based on IEEE1149.1 JTAG interface is developed. Unlike usual gdb-based… 
2006
2006
Floorplan and power/ground network co-synthesis for fast design convergence
As technology advances, the metal width decreases while the global wire length increases. This trend makes the resistance of the… 
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