Nios embedded processor

Known as: NIOS (processor), Nios, Nios (computer processor) 
Nios was Altera's first configurable 16-bit embedded processor for its FPGA product-line. For new designs, Altera recommends the 32-bit Nios II.
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Topic mentions per year

Topic mentions per year

1976-2018
010203019762018

Related topics

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5 relations
BareboxComparison of operating system kernelsDas U-BootGNU Compiler Collection
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Related mentions per year

Related mentions per year

1971-2018
197019801990200020102020
Nios embedded processor
GNU Compiler Collection
μClinux
Das U-Boot
Comparison of operating system kernels
Barebox

Papers overview

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2009
2009
Embedded Web Server on Nios II Embedded FPGA Platform
This Paper describes implementation of webserver using Altera Nios II embedded IP core, a configurable general purpose embedded… (More)
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2008
2008
Arithmetic Operations and Their Energy Consumption in the Nios II Embedded Processor
This paper reports the impact of different Nios II hardware and software options for arithmetic operations on its power and… (More)
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Highly Cited
2007
Highly Cited
2007
160-fold acceleration of the Smith-Waterman algorithm using a field programmable gate array (FPGA)
To infer homology and subsequently gene function, the Smith-Waterman (SW) algorithm is used to find the optimal local alignment… (More)
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2007
2007
Design and realization of the hardware platform based on the Nios soft-core processor
Programmability and flexibility are the trend of current electronic system. The Nios, a soft-core processor integrated in a FPGA… (More)
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2007
2007
Implementing elliptic curve cryptography on Nios II processor
This paper proposes an approach to accelerate Elliptic Curve Cryptography (ECC) algorithm on System-on-Programmable-Chip (SOPC… (More)
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2006
2006
Reconfigurable Implementation of Wavelet Transform on an Fpga-Augmented NIOS Processor
The wavelet transform is a very popular tool in engineering for signal analysis. With respect to image compression, the new JPEG… (More)
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Highly Cited
2004
Highly Cited
2004
Application-specific instruction generation for configurable processor architectures
Designing an application-specific embedded system in nanometer technologies has become more difficult than ever due to the rapid… (More)
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2004
2004
Custom Fpga Cryptographic Blocks for Reconfigurable Embedded Nios Processor
This paper introduces two custom blocks for Nios reconfigurable embedded processor implemented on Altera Field Programmable Gate… (More)
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2004
2004
FPGA based embedded processing architecture for the QRD-RLS algorithm
A novel implementation of the QR decomposition based recursive least squares (RLS) algorithm on Altera Stratix FPGAs is presented… (More)
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2002
2002
Montgomery Multiplication Coprocessor for Altera NIOS Embedded Processor
This paper describes scalable Montgomery Multiplication (MM) coprocessor optimized for Altera NIOS embedded processor implemented… (More)
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