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Modified Harvard architecture
The Modified Harvard architecture is a variation of the Harvard computer architecture that allows the contents of the instruction memory to be…
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Address space
Atmel ARM-based processors
Atmel AVR
Atmel AVR instruction set
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Broader (2)
Classes of computers
Computer architecture
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
AVRAND: A Software-Based Defense Against Code Reuse Attacks for AVR Embedded Devices
S. Pastrana
,
J. Tapiador
,
Guillermo Suarez-Tangil
,
Pedro Peris-López
International Conference on Detection of…
2016
Corpus ID: 20621833
Code reuse attacks are advanced exploitation techniques that constitute a serious threat for modern systems. They profit from a…
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2015
2015
Mechanical Properties in Kinematics Based on Pulse Coupled Neural Network
Yali Xu
,
Kaihua Xu
2015
Corpus ID: 55909902
In order to improve the efficiency of aerobics movement image analysis, on the basis of biological vision and image processing…
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2015
2015
Design & analysis of 16 bit RISC processor using low power pipelining
Priyank Trivedi
,
R. Tripathi
International Conference on Computing…
2015
Corpus ID: 15832498
A 16 bit low power pipelined RISC processor is proposed by us in this paper, the RISC processor consists of the block mainly ALU…
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2010
2010
On the Modified Asphalt Emulsion Technology
Hongbing Dan
2010
Corpus ID: 137721247
The emulsified asphalt at room temperature with good liquidity, to improve the performance of the original use of asphalt, with…
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2009
2009
Sharf: An FPGA-based customizable processor architecture
C. Bassoy
,
H. Manteuffel
,
F. Mayer-Lindenberg
International Conference on Field-Programmable…
2009
Corpus ID: 13499618
This paper presents a general architecture for soft processors based on a modified Harvard architecture, SHARF. The separation of…
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2006
2006
Underneath the Hood of the dsPIC DSC
C. Huddleston
2006
Corpus ID: 60519515
Review
2002
Review
2002
High performance dual-MAC DSP architecture
R. Kolagotla
,
J. Fridman
,
+6 authors
Lawrence A. Booth
IEEE Signal Processing Magazine
2002
Corpus ID: 61250405
The convergence of voice and video in next-generation wireless applications requires a processor that can efficiently implement a…
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2001
2001
CDSP: an application-specific digital signal processor for third generation wireless communications
Po-Chih Tseng
,
Chi-Kuang Chen
,
Liang-Gee Chen
ICCE. International Conference on Consumer…
2001
Corpus ID: 7063544
This paper presents an application-specific digital signal processor for third generation wireless communications. The processor…
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1986
1986
A subset FORTRAN compiler for a modified Harvard architecture
J. R. Parker
SIGP
1986
Corpus ID: 15542367
The architecture of the target computer clearly has a great impact on the design of a compiler's code generator. In particular…
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1986
1986
Modified Harvard architecture doubles performance of 68020
K. Marrin
1986
Corpus ID: 61354792
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