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Modified Harvard architecture
The Modified Harvard architecture is a variation of the Harvard computer architecture that allows the contents of the instruction memory to be…
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Address space
Atmel ARM-based processors
Atmel AVR
Atmel AVR instruction set
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Broader (2)
Classes of computers
Computer architecture
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Mechanical Properties in Kinematics Based on Pulse Coupled Neural Network
Yali Xu
,
Kaihua Xu
2015
Corpus ID: 55909902
In order to improve the efficiency of aerobics movement image analysis, on the basis of biological vision and image processing…
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2015
2015
ROPDetect : Detection of Code Reuse Attacks
Yifan Lu
,
Christopher Hansen
2015
Corpus ID: 1539998
Software exploitation, as used by malware and other kinds of attacks, require the attacker to take control of code execution…
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2015
2015
Design of Airborne Strapdown Inertial Navigation System Based on DSP Structure
Jing Yu
,
Hang Guo
2015
Corpus ID: 61288758
An airborne strapdown inertial navigation system based on DSP is introduced. The TMS320F28335 and TMS320C6416 DSP chips of TI…
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2013
2013
Design of Low Power Pipelined RISC Processor
Arun Kumar
2013
Corpus ID: 26664654
2 Abstract: This paper presents the design and implementation of a low power pipelined 32-bit RISC Processor. The various blocks…
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2013
2013
Design of Low Power Pipelined RISCProcessor
Arun kumar.M
2013
Corpus ID: 63126340
This paper presents the design and implementation of a low power pipelined 32-bit RISC Processor. The various blocks include the…
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2004
2004
A mini single-port instruction cache and its priority strategy for load-store conflict in a general purpose DSP
Xiangchao Zeng
,
Jing Chen
,
Fangyu Hu
Proceedings. ICCEA . 3rd International…
2004
Corpus ID: 12012382
In a general purpose DSP which is based on a modified Harvard architecture, a small instruction cache is adopted to alleviate the…
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2001
2001
A Progressive Methodology for the Verification of a DSP Chip
A. Habibi
,
S. Tahar
2001
Corpus ID: 36424
In this paper we describe a methodology for the formal verification using theorem proving of a DSP processor chip. We specified…
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1986
1986
A subset FORTRAN compiler for a modified Harvard architecture
J. R. Parker
SIGP
1986
Corpus ID: 15542367
The architecture of the target computer clearly has a great impact on the design of a compiler's code generator. In particular…
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1986
1986
Modified Harvard architecture doubles performance of 68020
K. Marrin
1986
Corpus ID: 61354792