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Memory controller

Known as: Memory scrambling, MCU, Memory controller unit 
The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a… 
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Related topics

Related topics

50 relations
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Broader (1)

Computer memory

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2018
Highly Cited
2018
Integrated marketing communications
The IMC Certificate Program invites applications from students in any undergraduate school at Northwestern. As described on the… 
Highly Cited
2016
Highly Cited
2016
Accelerating Dependent Cache Misses with an Enhanced Memory Controller
On-chip contention increases memory access latency for multi-core processors. We identify that this additional latency has a… 
Highly Cited
2012
Highly Cited
2012
Fuzzy Adaptive Internal Model Control Schemes for PMSM Speed-Regulation System
In this paper, the speed regulation problem for permanent magnet synchronous motor (PMSM) system under vector control framework… 
Highly Cited
2011
Highly Cited
2011
Reducing memory interference in multicore systems via application-aware memory channel partitioning
Main memory is a major shared resource among cores in a multicore system. If the interference between different applications… 
Highly Cited
2005
Highly Cited
2005
THE RELATIONSHIP BETWEEN INTEGRATED MARKETING COMMUNICATION, MARKET ORIENTATION, AND BRAND ORIENTATION
This paper relates integrated marketing communication (IMC) to market orientation (MO), brand orientation (BO), and external… 
Highly Cited
2001
Highly Cited
2001
Imc: Using Advertising and Promotion to Build Brands
Highly Cited
1999
Highly Cited
1999
Impulse: building a smarter memory controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse… 
Highly Cited
1999
Highly Cited
1999
A Multi-Country Comparison of the Drive for IMC
Highly Cited
1997
Highly Cited
1997
Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems
In microprocessor-based systems, large power savings can be achieved through reduction of the transition activity of the on- and… 
Highly Cited
1985
Highly Cited
1985
Implementing a cache consistency protocol
We present an ownership-based multiprocessor cache consistency protocol, designed for implementation by a single chip VLSI cache… 
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