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Intel QuickPath Interconnect

Known as: Intel QPI, Common Serial Interconnection, QPI interface 
The Intel QuickPath Interconnect (QPI) is a point-to-point processor interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon… 
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Related topics

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ArrandaleBroadwell (microarchitecture)ChipsetDEC Alpha

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Optics vs. copper — From the perspective of Thunderbolt 3 interconnect technology
"Thunderbolt 3" has adopt both copper and optical interconnect technologies, depends on the cable length used. Single cable can… 
2014
2014
Analysis of RLC interconnect delay model using second order approximation
Continuous scaling of CMOS technology leads to extremely fast device. However, the resulting interconnect structures impose so… 
2009
2009
Monolithic graphene nanoribbon electronics for interconnect performance improvement
In this paper, multi-layer graphene nanoribbon (GNR) is proposed as an emerging interconnect solution, which can be integrated… 
2007
2007
On Channel State Inference and Prediction Using Observable Variables in 802.11b Network
Performance of cross-layer protocols that recommend the relay of corrupted packets to higher layers can be improved significantly… 
2005
2005
SR ARQ for adaptive modulation systems combined with selection transmit diversity
Adaptive automatic repeat request (ARQ) schemes are quite effective for throughput enhancement in time-varying mobile channel… 
Review
2002
Review
2002
On-chip inductance cons and pros
  • Y. Ismail
  • IEEE Transactions on Very Large Scale Integration…
  • 2002
  • Corpus ID: 6560683
Provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and… 
2000
2000
Power chip interconnection : From wire bonding to area bonding
Inside the state-of-the-art power devices and power modules, interconnection of power devices is accomplished with wirebonds… 
Highly Cited
1996
Highly Cited
1996
High-speed clock network sizing optimization based on distributed RC and lossy RLC interconnect models
  • Qing K. ZhuW. Dai
  • IEEE Trans. Comput. Aided Des. Integr. Circuits…
  • 1996
  • Corpus ID: 37566492
To achieve path delay balance, instead of making faster paths slower by elongating wires used in most zero skew clock routing… 
1994
1994
Dielectric materials for advanced VLSI and ULSI technologies
Advancements in very-large-scale integration (VISI) and ultra-large-scale integration (ULSI) of semiconductor devices result in… 
1992
1992
Multiprotocol Interconnect on X.25 and ISDN in the Packet Mode
This document specifies the encapsulation of IP and other network layer protocols over X.25 networks, in accordance and alignment… 
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