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Intel QuickPath Interconnect
Known as:
Intel QPI
, Common Serial Interconnection
, QPI interface
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The Intel QuickPath Interconnect (QPI) is a point-to-point processor interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon…
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37 relations
Arrandale
Broadwell (microarchitecture)
Chipset
DEC Alpha
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Papers overview
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2015
2015
Alterations in cell surface area and deformability of individual human red blood cells in stored blood
Hyunjoo Park
,
Misook Ji
,
+4 authors
Yongkeun Park
2015
Corpus ID: 18915968
The functionality and viability of stored human red blood cells (RBCs) is an important clinical issue in transfusion. To…
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2014
2014
Construction and operation of a milli-Kelvin spectroscopic imaging STM for the study of correlated electron materials
S. Enayat
2014
Corpus ID: 93670204
Keywords: scanning tunneling microscopy ; dilution refregeration ; correlated electron materials ; Iron based superconductors…
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2012
2012
EXPLICIT TIMING ANALYSIS OF DISCONTINUOUS RC GLOBAL VLSI INTERCONNECT LINES UNDER RAMP INPUT
A. Goyal
,
V. Maheshwari
,
Sampath Kumar
,
Ece Deptt
2012
Corpus ID: 14065662
In this paper, discontinuous interconnect lines are modelled and analyzed as a cascaded line composed of many uniform…
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2010
2010
Quasiparticle interference in iron-based superconductors
A. Akbari
,
J. Knolle
,
I. Eremin
,
R. Moessner
2010
Corpus ID: 19780066
We systematically calculate quasiparticle interference (QPI) signatures for the whole phase diagram of iron-based superconductors…
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2010
2010
Mode Conversion at Via Discontinuities in Microwave Circuits
Wenxue Zhu
,
Yulu Tian
,
Tong Ling
2010
Corpus ID: 59479103
Mode conversion of via discontinuities in multilayer interconnect structures is in- vestigated. Electromagnetic waves travelling…
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2007
2007
On Channel State Inference and Prediction Using Observable Variables in 802.11b Network
Shirish S. Karande
,
S. A. Khayam
,
+4 authors
Jinwoo Hong
IEEE International Conference on Communications
2007
Corpus ID: 17225391
Performance of cross-layer protocols that recommend the relay of corrupted packets to higher layers can be improved significantly…
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2005
2005
Presentation and Formal Verification of a Family of Protocols for Latency Insensitive Design
S. Suhaib
,
David Berner
,
D. Mathaikutty
,
J. Talpin
,
S. Shukla
2005
Corpus ID: 55467496
With increasing clock frequencies in the gigahertz ranges, the distance signals travel during one clock cycle decreases, making a…
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2005
2005
NISC Technology and Preliminary Results
Mehrdad Reshadi
,
B. Gorjiara
,
D. Gajski
2005
Corpus ID: 18285500
A common way of improving an application’s performance is implementing it on a custom hardware. High level synthesis (HLS) and…
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2000
2000
New methodologies for interconnect reliability assessments of integrated circuits
S. Hau-Riege
2000
Corpus ID: 106816158
The stringent performance and reliability demands that will accompany the development of next-generation circuits and new…
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1992
1992
Multiprotocol Interconnect on X.25 and ISDN in the Packet Mode
A. Malis
,
David Robinson
,
R. Ullmann
Request for Comments
1992
Corpus ID: 881557
This document specifies the encapsulation of IP and other network layer protocols over X.25 networks, in accordance and alignment…
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