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Instruction set simulator
Known as:
ISS (disambiguation)
An instruction set simulator (ISS) is a simulation model, usually coded in a high-level programming language, which mimics the behavior of a…
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Related topics
Related topics
49 relations
Assembly language
Binary translation
Branch trace
Buffer overflow
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Vectorization of an augmented Riemann solver for the shallow water equations
M. Bader
,
Alexander Breuer
,
W. Holzl
,
Sebastian Rettenberger
International Symposium on High Performance…
2014
Corpus ID: 8052655
We discuss the vectorization of two different Riemann solvers for the shallow water equations. For a wave propagation method that…
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Highly Cited
2008
Highly Cited
2008
Cycle-approximate Retargetable Performance Estimation at the Transaction Level
Yonghyun Hwang
,
S. Abdi
,
D. Gajski
Design, Automation and Test in Europe
2008
Corpus ID: 8450843
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level…
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2007
2007
HySim: A fast simulation framework for embedded software development
S. Kraemer
,
Lei Gao
,
Jan Weinstock
,
R. Leupers
,
G. Ascheid
,
H. Meyr
International Conference on Hardware/Software…
2007
Corpus ID: 29254
Instruction Set Simulation (ISS) is widely used in system evaluation and software development for embedded processors. Despite…
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Highly Cited
2006
Highly Cited
2006
A SW performance estimation framework for early system-level-design using fine-grained instrumentation
T. Kempf
,
K. Karuri
,
Stefan Wallentowitz
,
G. Ascheid
,
R. Leupers
,
H. Meyr
Proceedings of the Design Automation & Test in…
2006
Corpus ID: 14569547
The increasing demands of high-performance in embedded applications under shortening time-to-market has prompted system…
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2006
2006
Constructing Portable Compiled Instruction-set Simulators-An ADL-driven Approach
Joseph D'Errico
,
W. Qin
Proceedings of the Design Automation & Test in…
2006
Corpus ID: 17323721
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless…
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2004
2004
DynamoSim: a trace-based dynamically compiled instruction set simulator
M. Poncino
,
Jianwen Zhu
IEEE/ACM International Conference on Computer…
2004
Corpus ID: 10043030
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems…
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Highly Cited
1999
Highly Cited
1999
A retargetable, ultra-fast instruction set simulator
Jianwen Zhu
,
D. Gajski
Design, Automation and Test in Europe Conference…
1999
Corpus ID: 14372975
In this paper we present new techniques which further improve the static compiled instruction set architecture (ISA) simulation…
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1996
1996
A graph based processor model for retargetable code generation
J. Praet
,
D. Lanneer
,
G. Goossens
,
W. Geurts
,
H. Man
Proceedings ED&TC European Design and Test…
1996
Corpus ID: 3360530
Embedded processors in electronic systems typically are tuned to a few applications. Development of processor specific compilers…
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Review
1995
Review
1995
DSP design tool requirements for embedded systems: A telecommunications industrial perspective
P. Paulin
,
C. Liem
,
T. C. May
,
S. Sutarwala
J. VLSI Signal Process.
1995
Corpus ID: 36494438
This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1…
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1993
1993
Insulin: An Instruction Set Simulation Environment
S. Sutarwala
,
P. Paulin
,
Y. Kumar
Computer Hardware Description Languages and their…
1993
Corpus ID: 39186629
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