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High-level architecture

Known as: STANAG 4603, High-level architecture (simulation), High Level Architecture 
The high-level architecture (HLA) is a general purpose architecture for distributed computer simulation systems. Using HLA, computer simulations can… Expand
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Highly Cited
2012
Highly Cited
2012
The Publish-Subscribe Internet Routing Paradigm (PSIRP) project aims at developing and evaluating an information-centric… Expand
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Highly Cited
2005
Highly Cited
2005
This work proposes a compact implementation of the AES S-box using composite field arithmetic in GF(((22)2)2). It describes a… Expand
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Highly Cited
2004
Highly Cited
2004
IBM Research has over 200 people working on Unstructured Information Management (UIM) technologies with a strong focus on Natural… Expand
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Highly Cited
2000
Highly Cited
2000
Part I: Basics. Introduction to Systems Modeling Concepts. Framework for Modeling and Simulation. Modeling Formalisms and Their… Expand
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Highly Cited
2000
Highly Cited
2000
A matrix comprising a water-insoluble beta -1,3-glucan gel in the shape of beads with diameters within the range of about 5 to… Expand
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1999
1999
  • P. T. Barham
  • Proceedings IEEE Virtual Reality (Cat. No…
  • 1999
  • Corpus ID: 61080499
The High Level Architecture (HLA) provides a framework for building large-scale, distributed virtual worlds. HLA provides a… Expand
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Review
1999
Review
1999
1. Introduction. Why a High Level Architecture for Modeling and Simulation. An HLA Federation Has Software and Data Components… Expand
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Highly Cited
1999
Highly Cited
1999
This paper describes a new, auto-adaptive algorithm for dead reckoning in DIS. In general dead-reckoning algorithms use a fixed… Expand
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Highly Cited
1998
Highly Cited
1998
Time management is required in simulations to ensure that temporal aspects of the system un der investigation are correctly… Expand
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Highly Cited
1995
Highly Cited
1995
  • D. Jones, D. Lewis
  • Proceedings of the IEEE Custom Integrated…
  • 1995
  • Corpus ID: 15695533
This paper presents an architecture for a FPGA oriented towards logic emulation, to achieve maximum usable logic density per unit… Expand
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