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Hardware verification language

Known as: HVL, Hardware verification languages 
A hardware verification language, or HVL, is a programming language used to verify the designs of electronic circuits written in a hardware… Expand
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Papers overview

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Highly Cited
2014
Highly Cited
2014
Heavyweight aggregates; High-performance concrete; Linear attenuation coefficient (l); Half-value layer (HVL); Tenth-value layer… Expand
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2014
2014
The present study deals to know morphological damages of leaves of four selected plant species near roadside due to vehicular air… Expand
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2012
2012
The cost of correcting errors in the design of an embedded system's hardware components can be higher than for its software… Expand
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2011
2011
In the past few years, the incidence of human visceral leishmaniasis (HVL) has increased in many districts of Fars Province… Expand
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2009
2009
Procedures are tested and compared for processing Rayleigh surface wave data to obtain one-dimensional shear wave velocity… Expand
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Highly Cited
2008
Highly Cited
2008
Background: This study aimed to determine the seroprevalence of canine visceral leishmaniasis in Meshkin-Shahr district as… Expand
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2004
2004
Verification Methodologies and Environment Architecture.- Verification Methodologies.- Anatomy of a Verification Environment… Expand
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Highly Cited
2003
Highly Cited
2003
  • M. Iyer
  • International Test Conference, . Proceedings. ITC…
  • 2003
  • Corpus ID: 12058920
Functional verijication of complex designs largely relies on the use of simulation in conjunction high-level verijication… Expand
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2001
2001
We investigate the seismic detectability of an overpressured reservoir in the North Sea by computing synthetic seismograms for… Expand
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Highly Cited
2000
Highly Cited
2000
About the Cover. Foreword. Preface. Why This Book Is Important. What This Book Is About. What Prior Knowledge You Should Have… Expand