Skip to search formSkip to main content
You are currently offline. Some features of the site may not work correctly.

Fast Cycle DRAM

Known as: FCRAM, Fast Cycle RAM 
Fast Cycle DRAM (FCRAM) is a type of synchronous dynamic random-access memory developed by Fujitsu and Toshiba. FCRAM has a shorter data access… Expand
Wikipedia

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2010
2010
This DRAM architecture optimization, which appears transparent to the memory controller, significantly reduces power consumption… Expand
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Is this relevant?
2008
2008
Fujitsu has developed a video codec LSI for the compression/decompression of high-definition television (HDTV) video in… Expand
  • figure 1
  • figure 2
  • table 1
  • figure 3
  • figure 4
Is this relevant?
2006
2006
As scaling-down of COB type FCRAMtrade (Fast Cycle RAM) approaches 0.1 um, storage node self-aligned contact (SAC") presents the… Expand
  • figure 2
  • figure 3
  • figure 6
  • figure 4
  • figure 5
Is this relevant?
2004
2004
A 256Mbit 133MHz clock rate CMOS Double Data Rate Fast Cycle Random Access Memory (DDR FCRAM) SODIMM/sup /spl reg// Module was… Expand
  • figure 1
  • figure 2
  • figure 4
  • figure 8
  • table 1
Is this relevant?
2002
2002
PURPOSE: A 4-bit prefetch type FCRAM(Fast Cycle RAM) having an improved data write control circuit and a data masking method… Expand
Is this relevant?
2001
2001
We implemented POPeye (Probe of Performance + eye), a system analysis simulator to evaluate DRAM performance in a personal… Expand
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Is this relevant?
2000
2000
A large scale embedded Fast Cycle RAM, FCRAM, macrocell for ASIC applications is described. It has 3.52 Giga Byte Per Second data… Expand
  • figure 1
  • figure 3
  • figure 2
  • figure 4
Is this relevant?
1999
1999
  • Steffen Hellmold
  • International Test Conference . Proceedings (IEEE…
  • 1999
  • Corpus ID: 38777630
In a collaboration initiated in 1997, Fujitsu and Philips have jointly developed a Design-for-Test methodology to facilitate… Expand
Is this relevant?
1998
1998
We propose an ultra-high speed 64-Mbit DRAM, with a random address access time (tRAC) of 26 ns and an address cycle time (tRC) of… Expand
  • table 1
Is this relevant?
1975
1975
  • IEEE Signal Processing Magazine
  • 1975
  • Corpus ID: 5654868
(FMA) released the MB86H51, which can compress and decompress full high-definition 1,920 dots x 1,080 video in real time using… Expand
Is this relevant?