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Explicit data graph execution

Known as: Edge 
Explicit data graph execution, or EDGE, is a type of instruction set architecture (ISA) which intends to greatly improve computing performance… 
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Basic blockC++CompilerData-flow analysis

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Performance Modeling and Bottleneck Analysis of EDGE Processors Using Dependence Graphs
Exploring new directions in ISA and microarchitecture design can be challenging due to the large search space. Efficient tools… 
2018
2018
Towards an Area-Efficient Implementation of a High ILP EDGE Soft Processor
In-order scalar RISC architectures have been the dominant paradigm in FPGA soft processor design for twenty years. Prior out-of… 
2010
2010
Atomic block formation for explicit data graph execution architectures
Limits on power consumption, complexity, and on-chip latency have focused computer architects on power-efficient designs that… 
2010
2010
M5 based EDGE architecture modeling
EDGE (Explicit Data Graph Execution) architectures, a class of architectures distinct from traditional RISC and CISC… 
Highly Cited
2009
Highly Cited
2009
An evaluation of the TRIPS computer system
The TRIPS system employs a new instruction set architecture (ISA) called Explicit Data Graph Execution (EDGE) that renegotiates… 
2007
2007
TRIPS: A distributed explicit data graph execution (EDGE) microprocessor
This article consists of a collection of slides from the author's conference resentation on TRIPS, a distributed explicit data… 
2007
2007
Software Infrastructure and Tools for the TRIPS Prototype
The TRIPS hardware prototype is the first instantiation of an Explicit Data Graph Execution (EDGE) architecture. Building the… 
2006
2006
Merging Head and Tail Duplication for Convergent Hyperblock Formation
VLIW and EDGE (explicit data graph execution) architectures rely on compilers to form high-quality hyper-blocks for good… 
2005
2005
Breaking the GOP / Watt Barrier with EDGE Architectures
Achieving excellent power/performance ratios is easy for processor designs that have sufficiently low performance needs. The… 
Highly Cited
2004
Highly Cited
2004
Scaling to the end of silicon with EDGE architectures
Microprocessor designs are on the verge of a post-RISC era in which companies must introduce new ISAs to address the challenges… 
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