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Error floor
The error floor is a phenomenon encountered in modern iterated sparse graph-based error correcting codes like LDPC codes and turbo codes. When the…
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Related topics
Related topics
9 relations
Concatenated error correction code
Convolutional code
DVB-S2
Low-density parity-check code
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Broader (1)
Error detection and correction
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2010
Highly Cited
2010
Real-Time 2.5 GS/s Coherent Optical Receiver for 53.3-Gb/s Sub-Banded OFDM
N. Kaneda
,
Qi Yang
,
Xiang Liu
,
S. Chandrasekhar
,
W. Shieh
,
Young-Kai Chen
Journal of Lightwave Technology
2010
Corpus ID: 26826840
A real-time receiver for the coherent optical orthogonal frequency-division multiplexing (CO-OFDM) detection is realized in a…
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2009
2009
High Performance Non-Binary Quasi-Cyclic LDPC Codes on Euclidean Geometries LDPC Codes on Euclidean Geometries
Bo Zhou
,
Jingyu Kang
,
Y. Tai
,
Shu Lin
,
Z. Ding
IEEE Transactions on Communications
2009
Corpus ID: 6617090
This paper presents algebraic methods for constructing high performance and efficiently encodable non-binary quasi-cyclic LDPC…
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2008
2008
Generalized IRA Erasure Correcting Codes for Hybrid Iterative/Maximum Likelihood Decoding
E. Paolini
,
G. Liva
,
B. Matuz
,
M. Chiani
IEEE Communications Letters
2008
Corpus ID: 43059634
The design of low-density parity-check (LDPC) codes under hybrid iterative / maximum likelihood decoding is addressed for the…
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2006
2006
BER prediction using EXIT charts for BICM with iterative decoding
T. Clevorn
,
S. Godtmann
,
P. Vary
IEEE Communications Letters
2006
Corpus ID: 826757
A method for the prediction of bit-error rates (BER) of bit-interleaved coded modulation systems with iterative decoding (BICM-ID…
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Highly Cited
2006
Highly Cited
2006
GEN03-6: Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation
Zhengya Zhang
,
L. Dolecek
,
B. Nikolić
,
V. Anantharam
,
M. Wainwright
IEEE Globecom
2006
Corpus ID: 292976
Several high performance LDPC codes have parity-check matrices composed of permutation submatrices. We design a parallel-serial…
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2005
2005
Short low-error-floor Tanner codes with Hamming nodes
G. Liva
,
William E. Ryan
IEEE Military Communications Conference
2005
Corpus ID: 43173314
While it is fairly easy to design good low-density parity-check codes with medium or large block lengths, and with code rates 1/2…
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Highly Cited
2004
Highly Cited
2004
Spectral phase-encoded time-spreading (SPECTS) optical code-division multiple access for terabit optical access networks
V. Hernandez
,
Yixue Du
,
+6 authors
S. Yoo
Journal of Lightwave Technology
2004
Corpus ID: 2653491
This paper discusses design, simulation, and experimental investigations of optical-code-division multiple-access (O-CDMA…
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2001
2001
On error floor and free distance of turbo codes
R. Garello
,
F. Chiaraluce
,
P. Pierleoni
,
Marco Scaloni
,
S. Benedetto
ICC . IEEE International Conference on…
2001
Corpus ID: 13712573
Turbo codes have excellent performance at low and medium signal-to-noise ratios (SNR) very close to the Shannon limit, and are at…
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Highly Cited
2000
Highly Cited
2000
Low density parity check codes for magnetic recording channels
Hongxin Song
,
R. Todd
,
J. R. Cruz
2000
Corpus ID: 17144277
We propose a system for magnetic recording, using a low density parity check (LDPC) code as the error-correcting-code, in…
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1965
1965
Rat sexual behavior: Photographic analysis of the intromission response
G. Bermant
1965
Corpus ID: 143799178
High-speed photography of electrically monitored rat sexual behavior suggested that the intromission response may be analyzed…
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