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Error floor

The error floor is a phenomenon encountered in modern iterated sparse graph-based error correcting codes like LDPC codes and turbo codes. When the… 
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2010
Highly Cited
2010
A real-time receiver for the coherent optical orthogonal frequency-division multiplexing (CO-OFDM) detection is realized in a… 
2009
2009
This paper presents algebraic methods for constructing high performance and efficiently encodable non-binary quasi-cyclic LDPC… 
2008
2008
This paper investigates the potential of non-binary LDPC codes to replace widely used Reed-Solomon (RS) codes for applications in… 
Highly Cited
2006
Highly Cited
2006
Several high performance LDPC codes have parity-check matrices composed of permutation submatrices. We design a parallel-serial… 
2006
2006
A method for the prediction of bit-error rates (BER) of bit-interleaved coded modulation systems with iterative decoding (BICM-ID… 
2006
2006
In this paper, we study the problem of joint permutor analysis and design for J-dimensional multiple turbo codes with J… 
Highly Cited
2004
Highly Cited
2004
This paper discusses design, simulation, and experimental investigations of optical-code-division multiple-access (O-CDMA… 
2002
2002
Abstract To accommodate the explosive packet-based data traffic in WDM networks, intelligent optical routing and switching are… 
2001
2001
Turbo codes have excellent performance at low and medium signal-to-noise ratios (SNR) very close to the Shannon limit, and are at… 
Highly Cited
2000
Highly Cited
2000
We propose a system for magnetic recording, using a low density parity check (LDPC) code as the error-correcting-code, in…