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EDRAM

Known as: Embedded DRAM, Embedded dynamic random access memory 
Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific… 
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Related topics

Related topics

27 relations
1T-SRAMApproximate computingBlue GeneBroadwell (microarchitecture)

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
The evolution of dense embedded memory in high performance logic technologies
Embedded memory (eMemory) plays a key role in the performance of modern multi-core processors, and for a broad class of cache… 
2006
2006
A 65nm low-power embedded DRAM with extended data-retention sleep mode
An extended data retention (EDR) sleep mode with ECC and MT-CMOS is proposed for embedded DRAM power reduction. In sleep mode… 
Review
2001
Review
2001
Guest Editors' Intoduction: The New World of Large Embedded Memories
0740-7475/01/$10.00 © 2001 IEEE May–June 2001 AS APPLICATIONS continually grow in complexity and size, data storage technology… 
Highly Cited
2001
Highly Cited
2001
A 0.13 /spl mu/m CMOS platform with Cu/low-k interconnects for system on chip applications
We describe an advanced 0.13 /spl mu/m CMOS technology platform optimized for density, performance, low power and analog/mixed… 
Highly Cited
2000
Highly Cited
2000
A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM
A 240 mW single-chip MPEG-4 video-phone LSI with a 16 Mb embedded DRAM is fabricated in a 0.25 /spl mu/m CMOS, triple-well, quad… 
Review
2000
Review
2000
Embedded DRAM: more than just a memory
Dynamic random access memory has been a viable semiconductor storage medium for more than three decades. Surprisingly, it has… 
2000
2000
A 60-MHz 240-mW MPEG-4 videophone LSI with 16-Mb embedded DRAM
A 240-mW single-chip MPEG-4 videophone LSI with a 16-Mb embedded DRAM is fabricated utilizing a 0.25-/spl mu/m CMOS triple-well… 
Highly Cited
1999
Highly Cited
1999
A Programmable BIST Core for Embedded DRAM
The programmable BIST design presented here supports various test modes using a simple controller. With the March C algorithm… 
1997
1997
Embedded DRAM Technologies
Issues on embedded DRAM technologies including their applications, process options, and tradeoffs are discussed. Real… 
1995
1995
DRAM macros for ASIC chips
DRAM macros in 4-Mb (0.8-/spl mu/m) and 16-Mb (0.5-/spl mu/m) DRAM process technology generations have been developed for CMOS… 
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