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Dynamic circuit network
Known as:
DCN
, IDC
, Inter-domain Controller protocol
A dynamic circuit network (DCN) is an advanced computer networking technology that combines traditional packet-switched communication based on the…
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Related topics
Related topics
8 relations
Fiber-optic communication
Internet
Large Hadron Collider
Optical fiber
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
THE DISK-OUTFLOW SYSTEM IN THE S255IR AREA OF HIGH-MASS STAR FORMATION
I. Zinchenko
,
S.-Y. Liu
,
+33 authors
China.
2015
Corpus ID: 118559992
We report the results of our observations of the S255IR area with the Submillimeter Array (SMA) at 1.3 mm in the very extended…
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2012
2012
An information-centric architecture for data center networks
Bongjun Ko
,
V. Pappas
,
+4 authors
D. Verma
Information-Centric Networking
2012
Corpus ID: 16623267
We propose a new Data Center Network (DCN) architecture, based on the principles of Information-Centric Networking (ICN). Our…
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Highly Cited
2006
Highly Cited
2006
An Ultra-Low-Power Memory With a Subthreshold Power Supply Voltage
Jinhui Chen
,
L. Clark
,
Tai-hua Chen
IEEE Journal of Solid-State Circuits
2006
Corpus ID: 36994801
A 512times13 bit ultra-low-power subthreshold memory is fabricated on a 130-nm process technology. The fabricated memory is fully…
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Highly Cited
2006
Highly Cited
2006
A process variation compensating technique with an on-die leakage current sensor for nanometer scale dynamic circuits
C. Kim
,
K. Roy
,
S. Hsu
,
R. Krishnamurthy
,
S. Borkar
IEEE Transactions on Very Large Scale Integration…
2006
Corpus ID: 7636352
This paper describes a process compensating dynamic (PCD) circuit technique for maintaining the performance benefit of dynamic…
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Highly Cited
2005
Highly Cited
2005
Development of dynamic cognitive networks as complex systems approximators: validation in financial time series
D. Koulouriotis
,
I. E. Diakoulakis
,
D. Emiris
,
C. Zopounidis
Applied Soft Computing
2005
Corpus ID: 27280942
2004
2004
Fault secure datapath synthesis using hybrid time and hardware redundancy
Kaijie Wu
,
R. Karri
IEEE Transactions on Computer-Aided Design of…
2004
Corpus ID: 7316015
A fault-secure datapath either generates a correct result or signals an error. This paper presents a register transfer level…
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Highly Cited
2001
Highly Cited
2001
The twin-transistor noise-tolerant dynamic circuit technique
G. Balamurugan
,
Naresh R Shanbhag
IEEE J. Solid State Circuits
2001
Corpus ID: 18025311
This paper describes a new circuit technique for designing noise-tolerant dynamic logic. It is shown that voltage scaling…
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2001
2001
Robustness of sub-70 nm dynamic circuits: analytical techniques and scaling trends
M. Anders
,
Ram K. Krishnamurthy
,
R. Spotten
,
K. Soumyanath
Symposium on VLSI Circuits. Digest of Technical…
2001
Corpus ID: 33406925
We present an accurate (to within 3%, across two process generations), three parameter, closed form, time-domain technique for…
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Highly Cited
1996
Highly Cited
1996
All-N-logic high-speed true-single-phase dynamic CMOS logic
R. Gu
,
M. Elmasry
IEEE J. Solid State Circuits
1996
Corpus ID: 62323570
In this paper, a novel all-N-logic single-phase high speed dynamic CMOS logic is introduced and analyzed. The circuits achieve…
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Review
1984
Review
1984
Communication Mechanisms for Programming Distributed Systems
S. Shatz
Computer
1984
Corpus ID: 15635664
LSI and VLSI advances have greatly decreased costs for such computer hardware as processors and memories. Now universities and…
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