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DisplayPort
Known as:
Single Stream Transport
, DP 1.3
, DisplayPort++
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DisplayPort is a digital display interface developed by the Video Electronics Standards Association (VESA). The interface is primarily used to…
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50 relations
2-in-1 PC
5K resolution
AMD OverDrive
AMD Radeon 400 series
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Sexuality education at the itinerant school of MST : students ’ perceptions
Luiz Fabiano ZanattaII
,
Silvia Piedade de MoraesII
,
Maria José Dias de FreitasII
,
José Roberto da Silva BrêtasII
2016
Corpus ID: 73658897
Sexuality education should be understood as a educational intervention process aimed at imparting knowledge and discussing issues…
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2013
2013
3D volumetric display design challenges
K. Osmanis
,
G. Valters
,
I. Osmanis
Nordic Microelectronics Event
2013
Corpus ID: 7866767
This paper presents and analyses several challenges of 3D volumetric display design process. Designs with video transfer and…
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2012
2012
Stoichiometry Determination for Mass-spectrometry Data: the Interval Case
Deepesh Agarwal
,
F. Cazals
,
N. Malod-Dognin
2012
Corpus ID: 17391014
In structural proteomics, given the individual masses of a set of protein types and the exact mass of a protein complex, the…
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2012
2012
A novel flexible printed circuit structure for gigabit data transmission
Shou-Kuo Sogo Hsu
,
Yu-Chang Pai
,
Po-Chuan Hsieh
Electrical Design of Advanced Packaging and…
2012
Corpus ID: 22540659
In order to improve the electrical channel designs with FPC board, a novel FPC structure is proposed in this work. The new…
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2011
2011
A 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme without phase noise degradation
Won-Young Lee
,
L. Kim
International Symposium on Circuits and Systems
2011
Corpus ID: 3128954
This paper presents a 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme which has no phase noise…
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2010
2010
A 1.62/2.7Gbps clock and data recovery with pattern based frequency detector for displayport
Kyungyoul Min
,
C. Yoo
IEEE transactions on consumer electronics
2010
Corpus ID: 25724707
A clock and data recovery (CDR) for the physical layer of DisplayPort at sink side is described. A 1/5-rate linear phase detector…
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2010
2010
A Design of DisplayPort AUX Channel
Seong-bok Cha
,
Kwang-Hee Yoon
,
Tae-Ho Kim
,
Jin-Ku Kang
2010
Corpus ID: 108104084
This paper presents an implementation of the DisplayPort AUX(Auxiliary) Channel. DisplayPort uses Main link, AUX Channel and Hot…
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2010
2010
A 720Mbps fast auxiliary channel design for DisplayPort 1.2
Hyun-Bae Jin
,
Jong-Seok Han
,
Jin-Ku Kang
International SoC Design Conference
2010
Corpus ID: 1255279
This paper presents the design of a fast auxiliary channel bus for DisplayPort 1.2 interface. The fast auxiliary channel supports…
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2009
2009
A spread spectrum clock generator with spread ratio error reduction scheme for DisplayPort main link
Won-Young Lee
,
L. Kim
IEEE International Symposium on Circuits and…
2009
Corpus ID: 42655404
In this paper, a spread spectrum clock generator (SSCG) with a process variation compensator for DisplayPort main link is…
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2008
2008
A design of DisplayPort link layer
Yong-Woo Kim
,
Seong-bok Cha
,
Jin-Ku Kang
International SoC Design Conference
2008
Corpus ID: 20675245
This paper presents an implementation of DisplayPort 1.1 Link Layer. The DisplayPort link layer provides isochronous transport…
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