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DPLL algorithm
Known as:
Davis-Putnam-Logemann-Loveland algorithm
, Davis–Putnam–Logemann–Loveland algorithm
, DPLL-Algorithm
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In computer science, the Davis–Putnam–Logemann–Loveland (DPLL) algorithm is a complete, backtracking-based search algorithm for deciding the…
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Related topics
Related topics
34 relations
Answer set programming
Automated planning and scheduling
Automated theorem proving
Backjumping
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Broader (1)
Constraint programming
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Zero crossing algorithm based phase recovery for DPLL based wireless communication
Sabyasachi Bhattacharyya
,
B. B. Purkayastha
,
Ragib Nasir Ahmed
,
K. Bhattacharyya
International Conference on Computing…
2015
Corpus ID: 18199250
Recent trends in the field of wireless communication have seen emphasis being given on very high quality reception of signals…
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2011
2011
Performance Evaluation of Digital Coherent Receivers for Phase-Modulated Radio-Over-Fiber Links
A. Caballero
,
D. Zibar
,
I. Monroy
Journal of Lightwave Technology
2011
Corpus ID: 37953003
The performance of optical phase-modulated (PM) radio-over-fiber (RoF) links assisted with coherent detection and digital signal…
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2010
2010
A calibration-free 800MHz fractional-N digital PLL with embedded TDC
M. Chen
,
D. Su
,
S. Mehta
IEEE International Solid-State Circuits…
2010
Corpus ID: 37483175
Digital Phase-Locked Loops (DPLLs), which are amenable to CMOS process scaling, have recently been demonstrated for both wireless…
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2009
2009
Symbolic Techniques in Propositional Satisfiability Solving
Moshe Y. Vardi
International Conference on Theory and…
2009
Corpus ID: 21051253
Search-based techniques in propositional satisfiability (SAT) solving have been enormously successful, leading to what is…
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2007
2007
Technique to Reduce the Resolution Requirement of Digitally Controlled Oscillators for Digital PLLs
Ping-Hsuan Hsieh
,
C. Yang
IEEE Transactions on Circuits and Systems - II…
2007
Corpus ID: 21531217
Phase-locked loops (PLLs) are a critical component in modern systems. Digital PLLs (DPLLs) are increasingly popular in CMOS…
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Review
2006
Review
2006
Implementing Survey Propagation on Graphics Processing Units
P. Manolios
,
Yimin Zhang
International Conference on Theory and…
2006
Corpus ID: 5746374
We show how to exploit the raw power of current graphics processing units (GPUs) to obtain implementations of SAT solving…
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2006
2006
Design of a 1GHz Digital PLL Using 0.18\mu m CMOS Technology
H. Janardhan
,
M. Wagdy
International Conference on Information…
2006
Corpus ID: 1485417
A digital phase-locked loop (DPLL) is designed and is shown to have 1GHz operation with lock time of 643.36ns. The lock time was…
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1996
1996
Frequency granularity in digital phaselock loops
F. Gardner
IEEE Transactions on Communications
1996
Corpus ID: 34344167
The frequency of a digital phaselock loop (DPLL) is necessarily quantized. Feedback around the quantizing nonlinearity leads to a…
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1995
1995
A performance analysis of a digital PLL based MPSK demodulator
M. Fitz
,
R. Cramer
IEEE Transactions on Communications
1995
Corpus ID: 16056600
This paper presents a generalized nonlinear (Markov) analysis technique that is used to evaluate the statistical performance of…
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Highly Cited
1989
Highly Cited
1989
All digital phase-locked loop: concepts, design and applications
Y. Shayan
,
T. Le-Ngoc
1989
Corpus ID: 56705606
The concepts of an all digital phase-locked loop (DPLL), which contains a purely digital phase detector, loop filter and voltage…
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