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DPLL algorithm

Known as: Davis-Putnam-Logemann-Loveland algorithm, Davis–Putnam–Logemann–Loveland algorithm, DPLL-Algorithm 
In computer science, the Davis–Putnam–Logemann–Loveland (DPLL) algorithm is a complete, backtracking-based search algorithm for deciding the… 
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Related topics

Related topics

34 relations
Answer set programmingAutomated planning and schedulingAutomated theorem provingBackjumping

Broader (1)

Constraint programming

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
A Digital Phase Locked Loop based System for Nakagami -m fading Channel Model
The modified structure of a Digital Phase Locked Loop (DPLL) based systems for dealing with Nakagami-m fading is proposed here… 
2011
2011
Efficient solving of large arithmetic constraint systems with complex Boolean structure: proof engines for the analysis of hybrid discrete-continuous systems
Hybrid Dynamical Systems Extending DPLL for Pseudo-Boolean Constraints Integration of DPLL-SAT and Linear Programming Integration… 
2009
2009
Symbolic Techniques in Propositional Satisfiability Solving
Search-based techniques in propositional satisfiability (SAT) solving have been enormously successful, leading to what is… 
Review
2005
Review
2005
THE LHC BEAM DUMPING SYSTEM TRIGGER SYNCHRONISATION AND DISTRIBUTION SYSTEM
Two LHC beam dumping systems (LBDS) will fast-extract the counter-rotating beams safely from the LHC collider during setting-up… 
2002
2002
Solving Optimal Satisfiability Problems Through Clause-Directed A*
Real-world applications, such as diagnosis and embedded control, are increasingly being framed as OpSAT problems problems of… 
1997
1997
칼만필터를 이용한 DPLL Bit synchronizer
1996
1996
Frequency granularity in digital phaselock loops
The frequency of a digital phaselock loop (DPLL) is necessarily quantized. Feedback around the quantizing nonlinearity leads to a… 
1989
1989
Digital phase-locked loop with jitter bounded
A design of an all-digital phase-locked loop (DPLL) with direct frequency synthesis is proposed for generating signals that… 
1986
1986
Synchronization Techniques for Digital Networks
A fault-tolerant network clock regenerator (NCR) will be analyzed, which consists of two digital phase-locked loops (DPLL), and… 
1984
1984
Performance Improvement of a Binary Quantized All-Digital Phased-Locked Loop with a New Aided-Acquisition Technique
A nonuniform sampling digital phase-locked loop (DPLL) is proposed with a sequential loop filter, in which two additional phase… 
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