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Cray XT3

The Cray XT3 is a distributed memory massively parallel MIMD supercomputer designed by Cray Inc. with Sandia National Laboratories under the codename… 
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Related topics

Related topics

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Catamount (operating system)Compute Node LinuxCray T3ECray XT4

Papers overview

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Highly Cited
2017
Highly Cited
2017
Run-to-run Variability on Xeon Phi based Cray XC Systems
The increasing complexity of HPC systems has introduced new sources of variability, which can contribute to significant… 
2008
2008
Large scale visualization on the Cray XT3 using ParaView.
Post-processing and visualization are key components to understanding any simulation. Porting ParaView, a scalable visualization… 
2008
2008
An Evaluation of the Oak Ridge National Laboratory Cray XT3
In 2005, Oak Ridge National Laboratory (ORNL) received delivery of a 5294 processor Cray XT3. The XT3 is Cray's third-generation… 
Highly Cited
2007
Highly Cited
2007
Cray XT4: an early evaluation for petascale scientific simulation
The scientific simulation capabilities of next generation high-end computing technology will depend on striking a balance among… 
2007
2007
Evaluation of Remote Memory Access Communication on the Cray XT3
This paper evaluates remote memory access (RMA) communication capabilities and performance on the Cray XT3. We discuss properties… 
Highly Cited
2006
Highly Cited
2006
Early evaluation of the Cray XT3
Oak Ridge National Laboratory recently received delivery of a 5,294 processor Cray XT3. The XT3 is Cray's third-generation… 
2006
2006
Network performance impact of a lightweight Linux for Cray XT3 compute nodes
This poster describes initial performance results comparing a tuned lightweight Linux environment to the standard Catamount… 
2005
2005
Implementation and Performance of Portals 3.3 on the Cray XT3
The Portals data movement interface was developed at Sandia National Laboratories in collaboration with the University of New… 
Highly Cited
1994
Highly Cited
1994
Large scale electronic structure calculations using the Lanczos method
1986
1986
A Framework for Generating Distributed-Memory Parallel Programs for Block Recursive Algorithms
A framework for synthesizing communication-efficient distributed-memory parallel programs for block recursive algorithms such as… 
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