Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 234,531,304 papers from all fields of science
Search
Sign In
Create Free Account
Chipkill
Known as:
Chipspare
, ECC Chipkill
, Single device data correction
Expand
Chipkill is IBM's trademark for a form of advanced error checking and correcting (ECC) computer memory technology that protects computer memory…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
12 relations
BCH code
Computer memory
ECC memory
Hamming code
Expand
Broader (1)
Error detection and correction
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Predicting Single Event Effects in DRAM
Donald Kline
,
Stephen Longofono
,
R. Melhem
,
A. Jones
IEEE International Symposium on Defect and Fault…
2019
Corpus ID: 204818706
The ability to leverage commodity memory in harsh environments due to radiation has the potential advance computing capability…
Expand
2018
2018
SSCMSD - Single-Symbol Correction Multi-symbol Detection for DRAM Subsystem
Ravikiran Yeleswarapu
,
Arun Kumar Somani
Pacific Rim International Symposium on Dependable…
2018
Corpus ID: 61808536
As DRAM technology continues to evolve towards smaller feature sizes and increased densities, faults in DRAM subsystem are…
Expand
2015
2015
Failure assessment of pediatric dental treatment under general anesthesia
E. Khodadadi
,
S. KHafari
,
F. Kuhestany
2015
Corpus ID: 80435913
Background and Aim: Due to the dramatic increase in dental treatment under general anesthesia and the potential risks and the…
Expand
2015
2015
Complete oral rehablitation in a 5-year old child with severe-early childhood caries - a case report
R. Jindal
,
Vaibhav Munjal
,
R. Garewal
,
Ekta Gakhar
,
M. Kaur
2015
Corpus ID: 74712483
Severe-early childhood caries (S-ECC) is a specific form of rampant decay of primary teeth in infants, characterized by…
Expand
2015
2015
Tiered ecc single-chip and double-chip chipkill scheme
胡潮红
,
姜郁成
,
郑宏忠
2015
Corpus ID: 146066312
Exemplary embodiments provides a TIERED ECC SINGLE-CHIP AND a DOUBLE-CHIP CHIPKILL SCHEME. The tiered error correction code (ECC…
Expand
2014
2014
Efficient RAS support for 3 D Die-Stacked DRAM
Hyeran Jeon
2014
Corpus ID: 18817885
Die-stacked DRAM is one of the most promising memory architectures to satisfy high bandwidth and low latency needs of many…
Expand
2013
2013
Reliability Models for Double Chipkill Detect/Correct Memory Systems
Xun Jian
,
Sean Blanchard
,
Nathan Debardeleben
,
Vilas Sridharan
,
Rakesh Kumar
2013
Corpus ID: 54873002
Chipkill correct is an advanced type of error correction used in memory subsystems. Existing analytical approaches for modeling…
Expand
2012
2012
Optimizing point Doubling Operations in ECC Zp
A. Sakthivel
,
R. Nedunchezhian
2012
Corpus ID: 13888991
Today a wireless network has minimum power consume and less security access. Based on these the suitable way of providing a…
Expand
2012
2012
An Operating System Resilient to DRAM Failures.
Kurt B. Ferreira
,
K. Pedretti
,
R. Brightwell
,
P. Bridges
,
David Fiala
,
F. Mueller
2012
Corpus ID: 18301116
Concern is growing in the high-performance computing (HPC) community on the reliability of future extreme scale systems. With…
Expand
2008
2008
Early Childhood Caries in children 12-24 months old in Mitchell's Plain, South Africa
M. Ali
2008
Corpus ID: 77112226
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE