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C to HDL
Known as:
C to RTL
, C-to-HDL
, List of C to HDL compilers
C to HDL tools convert C or C-like computer program code into a hardware description language (HDL) such as VHDL or Verilog. The converted code can…
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Bioinformatics
CoDeveloper
Computational fluid dynamics
Electronic design automation
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
FPGA Implementation of HHT for Feature Extraction of Signals
Mahesh Baban Shinde
,
M. Sharma
2016
Corpus ID: 212577385
In the analysis of real time signals accuracy plays very important role in most of the biomedical and bioelectrical applications…
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2014
2014
Prognostic value of LDL/HDL cholesterol ratio in patients undergoing coronary stenting
S. Novo
,
F. Macaione
,
F. Guarneri
,
E. Corrado
,
S. Evola
,
G. Novo
2014
Corpus ID: 75723553
2014
2014
HLS-based FPGA implementation of a predictive block-based motion estimation algorithm — A field report
Gregor Schewior
,
Christian Zahl
,
H. Blume
,
S. Wonneberger
,
J. Effertz
Proceedings of the Conference on Design and…
2014
Corpus ID: 18997691
This paper presents the application and evaluation of high-level synthesis (HLS) tools for a complex video processing algorithm…
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2012
2012
Design of H.264 video encoder with C to RTL design tool
Sangchul Kim
,
H. Kim
,
Taeil Chung
,
Jin-Gyeong Kim
International SoC Design Conference
2012
Corpus ID: 11099872
In this, we present a design methodology to use C-to-RTL design tool for H.264 video encoder hardware design. We applied the HLS…
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2010
2010
Extended compatibility path based hardware binding algorithm for area-time efficient designs
Udit Dhawan
,
Sharad Sinha
,
S. Lam
,
T. Srikanthan
Asia Symposium on Quality Electronic Design
2010
Corpus ID: 14546768
Hardware binding is a crucial step in high-level synthesis. In this paper we propose a path based hardware binding algorithm to…
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2006
2006
A Benchmark Approach for Compilers in Reconfigurable Hardware
J. J. Lopes
,
J. L. Silva
,
E. Marques
,
João M. P. Cardoso
International Workshop System-on-Chip for Real…
2006
Corpus ID: 137374
High-performance FPGA accelerating software applications are a growing demand in fields as communications, image processing, and…
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2005
2005
AUTOMATIC CO-VERIFICATION OF FPGA DESIGNS IN SIMULINK
Georg Brandmayr
,
G. Humer
,
M. Rupp
2005
Corpus ID: 10613682
Verification of DSP systems is an error-prone and timeconsuming process, because many manual steps are required to create a…
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2001
2001
An Approach for Automatic Data Allocation in C to HDL Compilers
T. Maruyama
IEEE Symposium on Field-Programmable Custom…
2001
Corpus ID: 3129334
In this paper, we propose a method for automatic data allocation in C to HDL compilers which support pointers. In our method…
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2000
2000
A C to HDL compiler for pipeline processing on FPGAs
T. Maruyama
,
Tsutomu Hoshino
Proceedings IEEE Symposium on Field-Programmable…
2000
Corpus ID: 11279288
In this paper, we show a compiler that generates high speed pipeline circuits for loop and recursive programs written in C…
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1998
1998
Implementing C designs in hardware: a full-featured ANSI C to RTL Verilog compiler in action
D. Soderman
,
Yuri Panchul
Proceedings International Verilog HDL Conference…
1998
Corpus ID: 58514309
The usage of a new full-featured ANSI C to synthesizable RTL Verilog compiler for implementing system-level algorithms in…
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