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Buffer amplifier
Known as:
Buffer
, Bus Buffer
, Voltage follower
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A buffer amplifier (sometimes simply called a buffer) is one that provides electrical impedance transformation from one circuit to another. Two main…
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Related topics
Related topics
25 relations
4000 series
Crosstalk
Decibel
Differential gain
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Analysis of High- $\kappa $ Spacer Asymmetric Underlap DG-MOSFET for SOC Application
K. Koley
,
Arka Dutta
,
S. Saha
,
C. Sarkar
IEEE Transactions on Electron Devices
2015
Corpus ID: 42901390
In this paper, asymmetric underlap double-gate (AUDG) MOSFET is studied to analyze the influence of high-k spacer on the…
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Highly Cited
2010
Highly Cited
2010
Realisations of single-resistance-controlled quadrature oscillators using a generalised current follower transconductance amplifier and a unity-gain voltage-follower
N. Herencsar
,
K. Vrba
,
J. Koton
,
A. Lahiri
2010
Corpus ID: 64684299
This article presents realisations of single-resistance-controlled-oscillators (SRCOs) using the recently proposed modern active…
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Highly Cited
2009
Highly Cited
2009
Analysis and Optimization of Current-Driven Passive Mixers in Narrowband Direct-Conversion Receivers
A. Mirzaei
,
H. Darabi
,
J. Leete
,
Xinyu Chen
,
K. Juan
,
A. Yazdi
IEEE Journal of Solid-State Circuits
2009
Corpus ID: 1331000
Properties of the current-driven passive mixer are explored to maximize its performance in a zero-IF receiver. Since there is no…
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2007
2007
A Column Driver with Low-Power Area-Efficient Push-Pull Buffer Amplifiers for Active-Matrix LCDs
Y. Son
,
Ji-Hun Kim
,
+7 authors
G. Cho
IEEE International Solid-State Circuits…
2007
Corpus ID: 15665318
Push-pull buffer amplifiers are operated in a transient mode for column drivers suitable for vertical N-dot inversion of an…
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Highly Cited
2002
Highly Cited
2002
A 1-Gb/s/pin 512-Mb DDRII SDRAM using a digital DLL and a slew-rate-controlled output buffer
T. Matano
,
Y. Takai
,
+12 authors
K. Koyama
Symposium on VLSI Circuits. Digest of Technical…
2002
Corpus ID: 41790977
We developed a 1-Gb/s/pin 512-Mb DDRII SDRAM composed of a digital delay-locked loop (DLL) and a slew-rate controlled output…
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Highly Cited
2001
Highly Cited
2001
A wide dynamic range receiver channel for a pulsed time-of-flight laser radar
T. Ruotsalainen
,
Pasi Palojärvi
,
J. Kostamovaara
IEEE J. Solid State Circuits
2001
Corpus ID: 62412648
An integrated receiver channel for a pulsed time-of-flight (TOF) laser rangefinder has been designed and tested. The bandwidth of…
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Review
1993
Review
1993
CMOS Buffer Amplifiers
R. Castello
1993
Corpus ID: 59903828
This paper gives a tutorial presentation on the design of buffer amplifiers in CMOS technology. These are circuits that must…
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1992
1992
Optimum tapered buffer
C. Prunty
,
L. Gál
1992
Corpus ID: 62409726
Driver stages in MOS circuitry have been extensively investigated during the last decade. recently a tapering rule for CMOS…
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Highly Cited
1987
Highly Cited
1987
A maximum pipelined CORDIC architecture for inverse kinematic position computation
C. S. Lee
,
P. Chang
IEEE Journal on Robotics and Automation
1987
Corpus ID: 11822345
A cost-effective coordinate rotation digital computer (CORDIC) architecture is described for the computation of inverse kinematic…
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Highly Cited
1986
Highly Cited
1986
A Highly Linear CMOS Buffer Amplifier
J. Fisher
,
Rudolf Koch
European Solid-State Circuits Conference
1986
Corpus ID: 43410689
This paper presents a CMOS buffer amplifier which achieves significant improvements in linearity and drive capability over…
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