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Test card
Known as:
Test tone
, Tv test pattern
, Test pattern
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A test card, also known as a test pattern or start-up/closedown test is a television test signal, typically broadcast at times when the transmitter…
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Related topics
Related topics
13 relations
Broader (1)
Broadcast engineering
Cathode ray tube
Digital Video Broadcasting
IRE (unit)
Integrated receiver/decoder
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2004
2004
Mixed RL-Huffman encoding for power reduction and data compression in scan test
M. Tehranipour
,
M. Nourani
,
Karim Arabi
,
A. Afzali-Kusha
IEEE International Symposium on Circuits and…
2004
Corpus ID: 2268957
This paper mixes two encoding techniques to reduce test data volume, test pattern delivery time and power dissipation in scan…
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Highly Cited
2004
Highly Cited
2004
ELF-Murphy data on defects and tests sets
E. McCluskey
,
Ahmad A. Al-Yamani
,
+5 authors
S. Mitra
22nd IEEE VLSI Test Symposium, . Proceedings.
2004
Corpus ID: 8468348
LSI logic has designed and manufactured two test chips at CRC. These test chips were used to investigate the characteristics of…
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Highly Cited
1999
Highly Cited
1999
On calculating efficient LFSR seeds for built-in self test
C. Fagot
,
O. Gascuel
,
P. Girard
,
C. Landrault
European Test Workshop (Cat. No.PR00390)
1999
Corpus ID: 15409833
Linear Feedback Shift Registers (LFSRs) are commonly used as pseudo-random test pattern generators (TPGs) in BIST schemes. This…
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Highly Cited
1997
Highly Cited
1997
An efficient method for compressing test data
T. Yamaguchi
,
M. Ishida
,
M. Tilgner
,
D. Ha
Proceedings International Test Conference
1997
Corpus ID: 16959896
The overall throughput of automatic test equipment (ATE) is sensitive to the download time of test data. An effective approach to…
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1996
1996
A complexity analysis of sequential ATPG
T. E. Marchok
,
A. El-Maleh
,
W. Maly
,
J. Rajski
IEEE Trans. Comput. Aided Des. Integr. Circuits…
1996
Corpus ID: 20420709
The research reported in this paper has been conducted to identify those attributes, of both sequential circuits and structural…
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Highly Cited
1995
Highly Cited
1995
Complexity of sequential ATPG
T. E. Marchok
,
A. El-Maleh
,
Wojciech Maly
,
J. Rajski
Proceedings the European Design and Test…
1995
Corpus ID: 8164728
The research reported in this paper was conducted to identify those attributes, of both sequential circuits and structural…
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Highly Cited
1994
Highly Cited
1994
Test embedding with discrete logarithms
Mody Lempel
,
Sandeep K. Gupta
,
M. Breuer
Proceedings of the ... IEEE VLSI Test Symposium
1994
Corpus ID: 5894578
When using Built-In Self Test (BIST) for testing VLSI circuits, a major concern is the generation of proper test patterns that…
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1992
1992
A small test generator for large designs
S. Kundu
,
L. Huisman
,
I. Nair
,
V. Ivenaar
,
L. Reddy
Proceedings International Test Conference
1992
Corpus ID: 10390999
We report an automatic test pattern generator that can handle designs with one million gates or more on medium size workstations…
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1991
1991
A test-pattern-generation algorithm for sequential circuits
E. Auth
,
M. Schulz
IEEE Design & Test of Computers
1991
Corpus ID: 35799899
A deterministic test-pattern-generation algorithm for synchronous sequential circuits is presented. The algorithm, called…
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Highly Cited
1977
Highly Cited
1977
Test generation for large logic networks
P. Bottorff
,
R. France
,
N. H. Garges
,
E. Orosz
Design Automation Conference
1977
Corpus ID: 5180167
A system for automatic test pattern generation for large logic networks is described. The network to be tested is assumed to…
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