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PowerPC 600
Known as:
PowerPC 603q
, 604 (disambiguation)
, PowerPC 603ev
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The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded…
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32-bit
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
Power and Performance Tradeoff of a Floating-Point Intensive Kernel on OpenCL FPGA Platform
Zheming Jin
,
H. Finkel
IEEE International Symposium on Parallel…
2018
Corpus ID: 51920772
As power is recognized as one of first-order constraints in high-performance computing, understanding how power and performance…
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2011
2011
Scalable collective message-passing algorithms
Paul Sack
2011
Corpus ID: 2262419
Governments, universities, and companies expend vast resources building the top supercomputers. The processors and interconnect…
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2004
2004
Motorola's PowerPC 603™ and PowerPC 604™ RISC Microprocessor: the C4/Ceramic-ball-grid Array Interconnect Technology
G. Kromann
,
David Gerke
,
Wayne Huang
,
Freescale Semiconductor
2004
Corpus ID: 17275049
- The Motorola PowerPC 603 and PowerPC 604 microprocessors are available in the 21mm controlled-collapsed-chip-connection/ceramic…
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2000
2000
Optimizing the cache performance of non-numeric applications
C. Luk
2000
Corpus ID: 60660107
The latency of accessing instructions and data from the memory subsystem is an increasingly crucial performance bottleneck in…
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1999
1999
A PowerPC platform full system simulation-from the MOOSE up
L. Robinson
,
G. Whisenhunt
IEEE International Performance, Computing, and…
1999
Corpus ID: 7325011
Systems simulation is not new. Several instances of varying degrees have appeared over the last few years providing a diverse…
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1998
1998
Implementation of an Environment for Monte Carlo Simulation of Fully 3-D Positron Tomography on a High-Performance Parallel Platform
H. Zaidi
,
C. Labbé
,
C. Morel
Parallel Computing
1998
Corpus ID: 622399
Highly Cited
1998
Highly Cited
1998
A TIME-DELAY NEURAL NETWORK ALGORITHM FOR REAL-TIME PEDESTRIAN RECOGNITION
C. Wöhler
,
Joachim K Anlaug
,
T. Portner
,
U. Franke
1998
Corpus ID: 17826765
This paper describes an algorithm for pedestrian recognition from sequences of grayscale stereo images taken from a pair of…
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1995
1995
Arias: Generic Support for Persistent Runtimes
Jason J. Han
,
A. Knaff
,
E. Pérez-Cortés
,
F. Saunier
1995
Corpus ID: 14853879
We describe the rationale and the design of Arias, a service of distributed memory with a single global address space. It…
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Highly Cited
1995
Highly Cited
1995
The PowerPC 620 microprocessor: a high performance superscalar RISC microprocessor
D. Levitan
,
T. Thomas
,
P. Tu
Digest of Papers. COMPCON'95. Technologies for…
1995
Corpus ID: 33953182
The PowerPC 620 RISC microprocessor is the first chip for the application server and technical workstation product line within…
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1993
1993
The PowerPC 601 design methodology
Timothy B. Brodnax
,
M. Schiffli
,
F. Watson
Proceedings of IEEE International Conference on…
1993
Corpus ID: 29534440
To produce a marketable PowerPC microprocessor on a short development schedule, an appropriate balance was needed between a fully…
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