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Power–delay product

Known as: Power-delay product 
In digital electronics, the power–delay product is a figure of merit correlated with the energy efficiency of a logic gate or logic family. Also… Expand
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Papers overview

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Highly Cited
2009
Highly Cited
2009
This paper proposes four low power adder cells using different XOR and XNOR gate architectures. Two sets of circuit designs are… Expand
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Highly Cited
2008
Highly Cited
2008
This paper presents an efficient reverse converter for transforming the redundant binary (RB) representation into two's… Expand
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Highly Cited
2008
Highly Cited
2008
In this paper a new low power and high performance adder cell using a new design style called “Bridge” is proposed. The bridge… Expand
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2008
2008
A SRAM cell must meet stringent requirements for operation in the sub-micron/nano ranges. A nine transistor (9T) cell at a 32 nm… Expand
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Highly Cited
2005
Highly Cited
2005
Multivalued logic has always attracted the attention of digital system and logic designers. However, the high-performance and low… Expand
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Highly Cited
2004
Highly Cited
2004
This paper analyzes methods to minimize the power-delay product of 64-bit carry-select adders intended for high-performance and… Expand
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Highly Cited
2003
Highly Cited
2003
University of Bologna 
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Highly Cited
1998
Highly Cited
1998
Many semiconductor quantum devices utilize a novel tunneling transport mechanism that allows picosecond device switching speeds… Expand
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Highly Cited
1997
Highly Cited
1997
Recently reported logic style comparisons based on full-adder circuits claimed complementary pass-transistor logic (CPL) to be… Expand
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Highly Cited
1997
Highly Cited
1997
We present a parallel analog vector quantizer (VQ) in 2.0-/spl mu/m double-poly CMOS technology and analyze its energetic… Expand
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