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Place and route
Known as:
Placement and routing
Place and route is a stage in the design of printed circuit boards, integrated circuits, and field-programmable gate arrays. As implied by the name…
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Related topics
Related topics
29 relations
Circuit diagram
Component placement
Electronic component
Electronic design automation
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
A Dynamic Programming-Based, Path Balancing Technology Mapping Algorithm Targeting Area Minimization
G. Pasandi
,
M. Pedram
IEEE/ACM International Conference on Computer…
2019
Corpus ID: 209495684
Path balancing technology mapping is a method of mapping a technology-independent logical description of a circuit, such as a…
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Review
2016
Review
2016
Computational Optimization of Placement and Routing using Genetic Algorithm
S. Hussain
,
K. Kishore
2016
Corpus ID: 63421916
In the VLSI chip designing process, Floor-planning is one of the vital stages which in turn have Placement and Routing tasks…
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2011
2011
An Analytical Model of the Propagation Induced Pulse Broadening (PIPB) Effects on Single Event Transient in Flash-Based FPGAs
Luca Sterpone
,
N. Battezzati
,
F. Kastensmidt
,
R. Chipana
IEEE Transactions on Nuclear Science
2011
Corpus ID: 24786453
A methodology for characterization of Propagation Induced Pulse Broadening (PIPB) effects concerning the Single Event Transients…
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2007
2007
Area and Power Modeling for Networks-on-Chip with Layout Awareness
P. Meloni
,
Igor Loi
,
+4 authors
L. Benini
VLSI design (Print)
2007
Corpus ID: 15092710
Networks-on-Chip (NoCs) are emerging as scalable interconnection architectures, designed to support the increasing amount of…
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2006
2006
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
M. Hübner
,
C. Schuck
,
J. Becker
Proceedings 20th IEEE International Parallel…
2006
Corpus ID: 15827127
The development of field programmable gate arrays (FPGAs) had tremendous improvements in the last few years. They were extended…
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2004
2004
Design automation and analysis of three-dimensional integrated circuits
Shamik Das
2004
Corpus ID: 2867133
This dissertation concerns the design of circuits and systems for an emerging technology known as three-dimensional integration…
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1995
1995
Geometric interconnection and placement algorithms
J. L. Ganley
1995
Corpus ID: 118682181
This dissertation examines a number of geometric interconnection, partitioning, and placement problems arising in the field of…
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1995
1995
Performance-driven simultaneous place and route for island-style FPGAs
Sudip Nag
,
Rob A. Rutenbar
International Conference on Computer Aided Design
1995
Corpus ID: 15539688
Sequential place and route tools for FPGAs are inherently weak at addressing both wirability and timing optimizations. This is…
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1992
1992
An automatic layout generator for analog circuits
J. Conway
,
G. G. Schrooten
[] Proceedings The European Conference on Design…
1992
Corpus ID: 61651658
A 'design by example' approach to automatic layout generation for analog circuits is presented. This approach uses a sample…
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Highly Cited
1978
Highly Cited
1978
Methods for Hierarchical Automatic Layout of Custom LSI Circuit Masks
B. Preas
,
C. Gwyn
Design Automation Conference
1978
Corpus ID: 16602268
A new automatic IC mask layout code is described which avoids most of the problems inherent in the present generation of layout…
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