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POWER4
Known as:
POWER4+
The POWER4 is a microprocessor developed by International Business Machines (IBM) that implemented the 64-bit PowerPC and PowerPC AS instruction set…
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AIX
CPU cache
Cell (microprocessor)
Central processing unit
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Papers overview
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Review
2012
Review
2012
Finding Chapel ’ s Peak : Introducing Auto-Tuning to the Chapel Parallel Programming Language
Ray S. Chen
2012
Corpus ID: 10310240
The benefit of automated application tuning has been the focus of numerous research projects, yet applying this technology…
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2010
2010
Low-level Optimizations in the PowerPC Linux Kernels
OzLabs
2010
Corpus ID: 55420973
We examine three low-level optimizations in the Linux® kernel for 32-bit and 64-bit PowerPC®, relating to cache flushing, memory…
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2008
2008
Optimum Flow Domain Partitioning of the Three-Dimensional Water Flow for Parallel Computation
M. Hanke
,
J. Vanderborght
2008
Corpus ID: 27588433
Three-dimensional vadose zone models are widely used for solving hydrological problems in a broad range of scales with a large…
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2004
2004
A New Array Format for Symmetric and Triangular Matrices
John A. Gunnels
,
F. Gustavson
Workshop on Applied Parallel Computin
2004
Corpus ID: 206591391
We introduce a new data format for storing triangular and symmetric matrices called HFP (Hybrid Full Packed). The standard two…
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2004
2004
Combining Cooperative Software / Hardware Prefetching and Cache Replacment
Zhenlin Wang
,
K. McKinley
,
D. Burger
2004
Corpus ID: 18538861
Data prefetching is an effective technique to hide memory latency and thus bridge the increasing processor-memory performance gap…
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2004
2004
Performance Evaluation of Linear Solvers Employed for Semiconductor Device Simulation
S. Wagner
,
T. Grasser
,
S. Selberherr
2004
Corpus ID: 39036825
We present the motivation and results of a benchmarking project for linear solvers employed for semiconductor device and circuit…
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2002
2002
The Efficiency and the Scalability of an Explicit Operator on an IBM POWER4 System
M. Frumkin
,
B. Biegel
2002
Corpus ID: 60373397
We present an evaluation of the efficiency and the scalability of an explicit CFD operator on an IBM POWER4 system. The POWER4…
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2002
2002
Exploring and Optimizing Itanium 2 TM Cache ( s ) Performance for Scientific Computing
W. Jalby
2002
Corpus ID: 15586005
Memory hierarchies are a key component in getting high performance on modern microprocessors. To satisfy the ever increasing…
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2001
2001
FedEx - a fast bridging fault extractor
Z. Stanojevic
,
D. Walker
Proceedings International Test Conference (Cat…
2001
Corpus ID: 15612962
Test pattern generation and diagnosis algorithms that target realistic bridging faults must be provided with a realistic fault…
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2001
2001
Silent Stores for Free: Reducing the Cost of Store Verification
Kevin M. Lepak
2001
Corpus ID: 15601167
Any opinions , findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not…
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