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MIPS-X

MIPS-X is a microprocessor and instruction set architecture developed as a follow-on project to the MIPS architecture at Stanford University by the… 
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Papers overview

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2009
2009
Reducing a program’s instruction count can improve cache behavior and bandwidth utilization, lower power consumption, and… 
Review
1998
Review
1998
MIPS-X-MP is a research project whose end goal is to build a sma.lI (workstation-sized) multiprocessor with a total throughput of… 
1994
1994
Designing a microprocessor is a significant undertaking. Modern RISC processors are no exception. Although RISC architectures… 
1993
1993
High performance processor organizations place large demands on the data memory hierarchy. The data bandwidth requirements of a… 
1992
1992
Most high-performance computers use registers to store program variables and temporaries for fast access, but many variables… 
1988
1988
MIPS-X is a high performance RISC microprocessor that can run with a peak throughput of 16 MIPS. The design began in the spring… 
1987
1987
MIPS-X is a 20-MIPS-peak VLSI processor designed at Stanford University. This document describes the external interface of MIPS-X… 
1986
1986
MIPS-X is a high performance second generation reduced instruction set microprocessor. This document describes the visible… 
Review
1986
Review
1986
MIPS-X-MP is a research project whose end goal is to build a small (workstation-sized) multiprocessor with a total throughput of… 
1986
1986
Abstract : We ported the Portable Standard Lisp compiler to MIPS-X, a reduced-instruction-set processor. In this paper we report…