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MIPS-X
MIPS-X is a microprocessor and instruction set architecture developed as a follow-on project to the MIPS architecture at Stanford University by the…
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Papers overview
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2009
2009
Rules Apply Code Density Concerns for New Architectures
S. Mckee
2009
Corpus ID: 16573986
Reducing a program’s instruction count can improve cache behavior and bandwidth utilization, lower power consumption, and…
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Review
1998
Review
1998
An Overview of the MIPS-XMP Project
J. Hennessy
,
M. Horowitz
1998
Corpus ID: 1420959
MIPS-X-MP is a research project whose end goal is to build a sma.lI (workstation-sized) multiprocessor with a total throughput of…
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1994
1994
Formal verification of a 32-bit pipelined RISC processor
Mohammad Darwish
1994
Corpus ID: 60710293
Designing a microprocessor is a significant undertaking. Modern RISC processors are no exception. Although RISC architectures…
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1993
1993
Specialized Caches To Improve Data Access Performance
B. Bray
1993
Corpus ID: 59732848
High performance processor organizations place large demands on the data memory hierarchy. The data bandwidth requirements of a…
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1992
1992
A CRegs implementation study based on the MIPS-X RISC processor
Steve Nowakowski
,
M. O'Keefe
Proceedings IEEE International Conference on…
1992
Corpus ID: 34716651
Most high-performance computers use registers to store program variables and temporaries for fast access, but many variables…
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1988
1988
The Design and Testing of MIPS-X
Jonathan Allen
,
F. Leighton
1988
Corpus ID: 64087280
MIPS-X is a high performance RISC microprocessor that can run with a peak throughput of 16 MIPS. The design began in the spring…
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1987
1987
MIPS-X: the external interface
A. Salz
,
A. Agarwal
,
P. Chow
1987
Corpus ID: 59638549
MIPS-X is a 20-MIPS-peak VLSI processor designed at Stanford University. This document describes the external interface of MIPS-X…
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1986
1986
MIPS-X instruction set and programmer''s manual
P. Chow
1986
Corpus ID: 59868396
MIPS-X is a high performance second generation reduced instruction set microprocessor. This document describes the visible…
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Review
1986
Review
1986
An overview of the MIPS-X-MP project
J. Hennessy
,
M. Horowitz
1986
Corpus ID: 61509001
MIPS-X-MP is a research project whose end goal is to build a small (workstation-sized) multiprocessor with a total throughput of…
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1986
1986
LISP on a reduced-instruction-set-processor
P. Steenkiste
,
J. Hennessy
LFP '86
1986
Corpus ID: 16709294
Abstract : We ported the Portable Standard Lisp compiler to MIPS-X, a reduced-instruction-set processor. In this paper we report…
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