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International Symposium on Microarchitecture

Known as: Micro 
The International Symposium on Microarchitecture (MICRO) is generally viewed as the top-tier academic conference on computer architecture. It is not… Expand
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Papers overview

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Highly Cited
2013
Highly Cited
2013
Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefit from the high ILP support… Expand
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2010
2010
In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first… Expand
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Highly Cited
2005
Highly Cited
2005
Writing concurrent programs is difficult because of the complexity of ensuring proper synchronization. Conventional lock-based… Expand
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Highly Cited
2005
Highly Cited
2005
Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process… Expand
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Highly Cited
2003
Highly Cited
2003
The bypass paths and multiported register files in microprocessors serve as an implicit interconnect to communicate operand… Expand
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Highly Cited
2003
Highly Cited
2003
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling… Expand
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Highly Cited
2003
Highly Cited
2003
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel… Expand
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Highly Cited
2002
Highly Cited
2002
We describe the design, analysis, and performance of an on-line algorithm to dynamically control the frequency/voltage of a… Expand
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2000
2000
Microprocessors are becoming faster at such a rapid pace that other components like random access memory cannot keep up. As a… Expand
1995
1995
Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high… Expand
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