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Constraint graph (layout)

Known as: Horizontal constraint graph, Vertical constraint graph 
In some tasks of integrated circuit layout design a necessity arises to optimize placement of non-overlapping objects in the plane. In general this… Expand
Wikipedia

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
1998
1998
Abstract Channel routing is a key problem in the physical design of VLSI chips. It is known that max(d max , v max ) is a lower… Expand
1993
1993
The channel routing problem in VLSI design is to route a specified interconnection among modules in as small an area as possible… Expand
1993
1993
The WISER algorithm for over-the-cell channel routing in the standard cell design style using the two-layer routing model is… Expand
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1991
1991
In this paper, we present a new algorithm, called WISER, for over-the-cell channel routing in the standard cell design technology… Expand
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1991
1991
The authors present a novel algorithm for three-layer, over-the-cell channel routing of standard cell designs. The novelty of the… Expand
1991
1991
  • C. Y. Hou, C. Chen
  • IEEE International Conference on Computer-Aided…
  • 1991
  • Corpus ID: 19100137
A hierarchical pin permutation algorithm is presented which is used as a preprocessor of conventional channel routing algorithms… Expand
1987
1987
We present a hybrid three-layer channel-routing algorithm that combines horizontal-vertical-horizontal (HVH) and vertical… Expand
Highly Cited
1985
Highly Cited
1985
1. Introduction.- 1.1. Motivation.- 1.2. Outline.- 2. Detailed Routing.- 2.1. Problem Statement.- 2.2. Important Factors in… Expand
1985
1985
  • M. Terai
  • IEEE Transactions on Computer-Aided Design of…
  • 1985
  • Corpus ID: 15465353
The channel router, which routes a rectangular channel with two rows of terminals along its top and bottom sides, is extensively… Expand
1983
1983
A new approach to the 2-layer channel-routing problem is introduced. The method allows horizontal and vertical connections on… Expand