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Alzheimer's Disease Assessment Scale-Cognitive CDISC Version Questionnaire
Known as:
ADAS-COG
, ADC
The CDISC version of the Alzheimer's Disease Assessment Scale-Cognitive (CDISC ADAS-Cog) containing 15 summary-level tests. This version is based on…
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National Institutes of Health
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Related topics
Related topics
2 relations
CDISC Questionnaire Category Terminology
Clinical Data Interchange Standards Consortium Terminology
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Fast ADC based multichannel acquisition system for the GEM detector
G. Kasprowicz
,
T. Czarski
,
+8 authors
Wojciech Zabolotny
Other Conferences
2012
Corpus ID: 109677181
A novel approach to the Gas Electron Multiplier1 (GEM) detector readout is presented. Unlike commonly used methods, based on…
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2010
2010
ADC Based Measurements:a Common Basis for the Uncertainty Estimation
C. Spataro
2010
Corpus ID: 6921757
In the last years, many Authors have dealt with the uncertainty evaluation of the measurement performed by using an analog-to…
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Highly Cited
2009
Highly Cited
2009
Multi-Gigabit communication: the ADC bottleneck1
Jaspreet Singh
,
Sandeep Ponnuru
,
Upamanyu Madhow
IEEE International Conference on Ultra-Wideband
2009
Corpus ID: 7143288
The economies of scale in modern communication systems are enabled by architectures that take advantage of Moore's law to…
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2009
2009
A 100 MS/s 4 MHz Bandwidth 70 dB SNR $\Delta \Sigma$ ADC in 90 nm CMOS
Y. Fujimoto
,
Y. Kanazawa
,
Pascal Lo Ré
,
K. Iizuka
IEEE Journal of Solid-State Circuits
2009
Corpus ID: 955128
This paper describes the results of an implementation of a high speed DeltaSigma ADC in 90 nm CMOS process, which is developed…
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2009
2009
A 42 mW 2 GS/s 4-bit flash ADC in 0.18-μm CMOS
Lianhong Wu
,
F. Huang
,
Yang Gao
,
Yan Wang
,
Jia Hua Cheng
International Conference on Wireless…
2009
Corpus ID: 1691413
A low power 4-bit 2 GS/s flash ADC is presented. To enhance the speed, the analog part of the ADC is fully pipelined; reset…
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Highly Cited
2008
Highly Cited
2008
A 6-Bit 1.6-GS/<emphasis emphasistype="roman">s</emphasis> Low-Power Wideband Flash ADC Converter in 0.13-<formula formulatype="inline"><tex Notation="TeX">$\mu$</tex> </formula><emphasis…
Member Ieee Ayman Ismail
,
Fellow Ieee Mohamed Elmasry
IEEE Journal of Solid-State Circuits
2008
Corpus ID: 61646393
In this work, a new termination technique for the averaging network of the flash analog-to-digital converter (ADC) input…
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2006
2006
A 10-bit 200MS/s Pipeline A/D Converter for High-Speed Video Signal Digitizer
Tomohiro Nezuka
,
K. Misawa
,
Junichiro Azami
,
Yusuke Majima
,
J. Okamura
IEEE Asian Solid-State Circuits Conference
2006
Corpus ID: 39148539
A 10-bit 200MS/s A/D converter (ADC) for highspeed video signal digitizer is presented. The ADC has a 14- bit pipeline ADC core…
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2004
2004
A 4GS/s 6b flash ADC in 0.13 /spl mu/m CMOS
C. Paulus
,
Hans-Martin Bluthgen
,
+5 authors
Roland Thewes
Symposium on VLSI Circuits. Digest of Technical…
2004
Corpus ID: 42255342
A 4GS/s 6b flash ADC with 8b output is presented realized in a 0.13 /spl mu/m standard CMOS technology. The outputs of 255 small…
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2003
2003
10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 /spl mu/m CMOS process
Lukas Dörrer
,
F. Kuttner
,
A. Wiesbauer
,
A. Giandomenico
,
T. Hartig
European Solid-State Circuits Conference
2003
Corpus ID: 16815560
A 10-bit resolution continuous-time multi-bit /spl Sigma//spl Delta/ ADC for UMTS is introduced. A power-efficient implementation…
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2001
2001
A 14 b 40 MSample/s pipelined ADC with DFCA
P. Yu
,
S. Shehata
,
+6 authors
Turker Kuyel
IEEE International Solid-State Circuits…
2001
Corpus ID: 10476280
A DAC and feedback capacitor averaging (DFCA) technique used in a pipelined ADC achieves 84 dB SFDR and 74 dB SNR. Also external…
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