eXtended Torus routing algorithm for networks-on-chip: a routing algorithm for dynamically reconfigurable networks-on-chip

Abstract

This paper presents a novel routing algorithm called eXtended Torus routing algorithm for networks-on-chip (XTRANC) which supports topologyies based on a variable number and size of inner-torus building blocks. The inner-tori partition a traditional mesh network into an arbitrary number of sub-networks to increase the mesh performance. The subnetworks can… (More)
DOI: 10.1049/iet-cdt.2013.0087

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