Yield considerations in the choice of 3D technology

  title={Yield considerations in the choice of 3D technology},
  author={Garth Smith and Larry Smith and Sharath Hosali and Sitaram Arkalgud},
  journal={2007 International Symposium on Semiconductor Manufacturing},
Die-to-wafer (DtW) stacking offers a yield advantage over wafer-to-wafer (WtW) and system-on-a-chip (SoC) if testing can identify good die and reduce stacking of good and bad die pairs. In this study, an SoC is broken into two equal areas to form a 3D system, and best case yields of DtW and WtW is compared. Testing need not be perfect to realize significant yield advantage with DtW. 
Highly Cited
This paper has 52 citations. REVIEW CITATIONS
36 Citations
5 References
Similar Papers


Publications citing this paper.
Showing 1-10 of 36 extracted citations

53 Citations

Citations per Year
Semantic Scholar estimates that this publication has 53 citations based on the available data.

See our FAQ for additional information.


Publications referenced by this paper.
Showing 1-5 of 5 references

3-D: It All Comes Down to Cost”, to be presented at 3-D Architectures for Semiconductor Integration and Packaging conference

  • L. Smith
  • 2007
1 Excerpt

A Discussion of Yield Modeling with Defect Clustering, Circuit Repair, and Circuit Redundancy

  • T. L. Michalka, R. C. Varshney, J. D. Meindl
  • IEEE Transactions on Semiconductor Manufacturing,
  • 1990

Similar Papers

Loading similar papers…