Yield considerations in the choice of 3D technology

@article{Smith2007YieldCI,
  title={Yield considerations in the choice of 3D technology},
  author={Garth Smith and Larry Smith and Sharath Hosali and Sitaram Arkalgud},
  journal={2007 International Symposium on Semiconductor Manufacturing},
  year={2007},
  pages={1-3}
}
Die-to-wafer (DtW) stacking offers a yield advantage over wafer-to-wafer (WtW) and system-on-a-chip (SoC) if testing can identify good die and reduce stacking of good and bad die pairs. In this study, an SoC is broken into two equal areas to form a 3D system, and best case yields of DtW and WtW is compared. Testing need not be perfect to realize significant yield advantage with DtW. 
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3-D: It All Comes Down to Cost”, to be presented at 3-D Architectures for Semiconductor Integration and Packaging conference

  • L. Smith
  • 2007
1 Excerpt

A Discussion of Yield Modeling with Defect Clustering, Circuit Repair, and Circuit Redundancy

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