XED: Exposing On-Die Error Detection Information for Strong Memory Reliability

@article{Nair2016XEDEO,
  title={XED: Exposing On-Die Error Detection Information for Strong Memory Reliability},
  author={Prashant J. Nair and Vilas Sridharan and Moinuddin K. Qureshi},
  journal={2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA)},
  year={2016},
  pages={341-353}
}
Large-granularity memory failures continue to be a critical impediment to system reliability. To make matters worse, as DRAM scales to smaller nodes, the frequency of unreliable bits in DRAM chips continues to increase. To mitigate such scaling-related failures, memory vendors are planning to equip existing DRAM chips with On-Die ECC. For maintaining compatibility with memory standards, On-Die ECC is kept invisible from the memory controller. This paper explores how to design high reliability… CONTINUE READING

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