When Caches Aren't Enough: Data Prefetching Techniques

  title={When Caches Aren't Enough: Data Prefetching Techniques},
  author={Steven P. Vanderwiel and David. J. Lilja},
  journal={IEEE Computer},
T he past decade has seen enormous strides in microprocessor fabrication technology and design methodology. As a result, CPU performance has outpaced that of dynamic RAM, the primary component of main memory. This expanding gap has required developers to use increasingly aggressive techniques to reduce or hide the large latency of main-memory accesses. The use of cache memory hierarchies has been the chief technique to reduce this latency. The more expensive static RAM (SRAM) memories used in… CONTINUE READING
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