Wear rate leveling: Lifetime enhancement of PRAM with endurance variation

@article{Dong2011WearRL,
  title={Wear rate leveling: Lifetime enhancement of PRAM with endurance variation},
  author={Jianbo Dong and Lei Zhang and Yinhe Han and Ying Wang and Xiaowei Li},
  journal={2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)},
  year={2011},
  pages={972-977}
}
The limited write endurance of phase change random access memory (PRAM) is one of the major obstacles for PRAM-based main memory. Wear leveling techniques were proposed to extend its lifetime by balancing writes traffic. Another important concern that need to be considered is endurance variation in PRAM chips. When different PRAM cells have distinct endurance, balanced writes will result in lifetime degradation due to the weakest cells. Instead of balancing writes traffic, in this paper we… CONTINUE READING
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