Waveform generator for RADAR using FPGA

  title={Waveform generator for RADAR using FPGA},
  author={A. Sawant and S. Patil and K. Aurobindo},
  journal={2018 3rd IEEE International Conference on Recent Trends in Electronics, Information \& Communication Technology (RTEICT)},
  • A. Sawant, S. Patil, K. Aurobindo
  • Published 2018
  • Computer Science
  • 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)
This paper presents a design of waveform generator, in which Radio Detection and Ranging (RADAR) waveforms are generated using Direct Digital Frequency Synthesizer (DDFS) technology and implemented on Field Programmable Gate Array (FPGA). DDFS is designed using Coordinate Rotational Digital Computer (CORDIC) algorithm whose output amplitude has accuracy up to 5 decimal places. It has good resolution and better utilization of resources in a device which reduces overall system hardware size and… Expand
A Segmentation Model of ECU Excitation Signal Based on Characteristic Parameters
Based on the simulation experiment, spectrum analysis proves that this modeling method ensures that the original signal’s effective information is not lost, and ESCP-SM is realized based on virtual instrument technology, and provides excitation signals for a Komatsu 8 ECU. Expand


Design and implementation of a FPGA-based Direct digital synthesizer
A method for the design as well as implementation of FPGA-based Direct digital synthesizer (DDS) is presented and corresponding system simulation and experimental results are given. Expand
FPGA-based design, implementation, and evaluation of digital sinusoidal generators
An FPGA-based environment for the design, implementation and evaluation of systems aimed at the direct digital synthesis (DDS) of sinusoidal waveforms is presented. Expand
Design of A DDS based frequency synthesizer
In this paper, we will present a design of a DDS based frequency synthesizer whose output is 67-83MHz, and which will be used in an X band sweep frequency source as the phase detect frequency of PLL.Expand
FPGA implementation of pipelined CORDIC based quadrature direct digital synthesizer with improved SFDR
The FPGA implementation of one such DDS which has quadrature outputs, based on pipelined CORDIC, has considerable improvement in terms of spurious free dynamic range (SFDR) compared to other existing designs at reduced hardware. Expand
DDS architecture for digital frequency generation
Direct digital synthesizers (DDS) are important components in many digital communication systems(4).DDSs are now available as integrated circuits and their output waveforms up to hundreds ofExpand
Study on spurious suppression method of high accuracy DDS
The design of novel DDS signal source is based on the improved CORDIC algorithm and the phase accumulator without frequency error, and the simulation results show the signal source has advantages of relatively pure frequency spectrum, high SNR and obvious spurious suppression. Expand
Digital Synthesizers and Transmitters for Software Radio
Book of digital synthesizers and transmitters for software radio, as an amazing reference becomes what you need to get. Expand
Khanchandani, “Comparative Study of Different PLL Frequency Synthesizers
  • International Journal of Innovative Research and Development (IJIRD),
  • 2013
A Technical Tutorial on Digital SignalSynthesis
  • Application Note, 1999.
  • 1999
Radar Handbook
  • 1990