Wafer-level vacuum packaging for hetero-integration by thermo-compression bonding using planarized-electroplated gold bumps

Abstract

Wafer-level vacuum sealing and electrical interconnection are often crucial for advanced device packaging. This article presents a novel packaging and integration technology, which is applicable to non-planar (i.e. microstructured) and/or temperature-sensitive wafers, by means of Au-Au low-temperature thermo-compression bonding utilizing electroplated Au… (More)

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