WL-Emap: Wirelength prediction based technology mapping for FPGAs

@article{Chavez2012WLEmapWP,
  title={WL-Emap: Wirelength prediction based technology mapping for FPGAs},
  author={Rolando Chavez and Senthilkumar Thoravi Rajavel and Ali Akoglu},
  journal={2012 VIII Southern Conference on Programmable Logic},
  year={2012},
  pages={1-6}
}
Technology mapping is the first stage of the process of porting an application onto Field Programmable Gate Array (FPGA) architecture. This stage is highly critical as it sets the constraints of its successor stages of clustering, placement and routing. Intrinsic Shortest Path Length (ISPL) has been shown to accurately predict the post placement individual… CONTINUE READING